unicorn/qemu/target-arm
Fabian Aggeler f120ad5308
target-arm: implement IRQ/FIQ routing to Monitor mode
SCR.{IRQ/FIQ} bits allow to route IRQ/FIQ exceptions to monitor CPU
mode. When taking IRQ exception to monitor mode FIQ exception is
additionally masked.

Backports commit de38d23b542efca54108ef28bcc0efe96f378d2e from qemu
2018-02-11 18:51:21 -05:00
..
arm_ldst.h import 2015-08-21 15:04:50 +08:00
cpu-qom.h remove slow cpu QOM casts (#815) 2017-05-02 14:56:39 +08:00
cpu.c target-arm: add CPREG secure state support 2018-02-11 18:29:35 -05:00
cpu.h target-arm: add secure state bit to CPREG hash 2018-02-11 18:35:52 -05:00
cpu64.c target-arm: add CPREG secure state support 2018-02-11 18:29:35 -05:00
crypto_helper.c Arm support ported. (#736) 2017-01-23 23:30:57 +08:00
helper-a64.c target-arm: Use new revbit functions 2018-02-11 02:57:55 -05:00
helper-a64.h import 2015-08-21 15:04:50 +08:00
helper.c target-arm: implement IRQ/FIQ routing to Monitor mode 2018-02-11 18:51:21 -05:00
helper.h rework code/block tracing 2016-01-22 19:07:50 -08:00
internals.h Arm support ported. (#736) 2017-01-23 23:30:57 +08:00
iwmmxt_helper.c import 2015-08-21 15:04:50 +08:00
kvm-consts.h import 2015-08-21 15:04:50 +08:00
Makefile.objs delete sparc32_dma.h & arm-semi.c 2017-01-19 15:10:41 +08:00
neon_helper.c Arm support ported. (#736) 2017-01-23 23:30:57 +08:00
op_addsub.h import 2015-08-21 15:04:50 +08:00
op_helper.c import 2015-08-21 15:04:50 +08:00
psci.c import 2015-08-21 15:04:50 +08:00
translate-a64.c target-arm: Add condexec state to insn_start 2018-02-11 15:13:40 -05:00
translate.c target-arm: add secure state bit to CPREG hash 2018-02-11 18:35:52 -05:00
translate.h target-arm: add non-secure Translation Block flag 2018-02-11 17:50:46 -05:00
unicorn.h arm64eb: add support for ARM64 big endian. 2017-04-24 23:30:01 +08:00
unicorn_aarch64.c aarch64: Add FPCR and FPSR registers 2018-01-16 17:37:47 +00:00
unicorn_arm.c fix conflicts 2017-03-30 12:23:24 +08:00