Commit graph

518 commits

Author SHA1 Message Date
Richard Henderson 6b4b493dae
tcg: Change tcg_global_mem_new_* to take a TCGv_ptr
Thus, use cpu_env as the parameter, not TCG_AREG0 directly.
Update all uses in the translators.

Backports commit e1ccc05444676b92c63708096e36582be27fbee1 from qemu
2018-02-08 12:33:33 -05:00
Richard Henderson afb67fc002
target/arm: Fix aa64 ldp register writeback
Backports commit 3e4d91b94ce400326fae0850578d9e9f30a71adb from qemu
2018-02-08 08:29:51 -05:00
Eric Blake 37cdcbf771
maint: Fix macros with broken 'do/while(0); ' usage 2018-02-07 20:27:37 -05:00
Lioncash 0f453b0595
target/arm: Add aa{32, 64}_vfp_{dreg, qreg} helpers
Backports commit 9a2b5256ea1f68c89d5da4b54f180f576c2c82d6 from qemu
2018-02-07 10:09:26 -05:00
Lioncash dd577f5ea5
target/arm: Change the type of vfp.regs
Backports commit 3f68b8a5a6862f856524bb347bf348ae364dd43c from qemu
2018-02-07 09:57:43 -05:00
Lioncash ef07c136b6
target/arm: Add fp16 support to vfp_expand_imm
Backports commit 8081796a75414f9ed5ec3d97158e543ed45908ec from qemu.
2018-02-07 09:47:04 -05:00
Lioncash b55f35ba92
target/arm: Split out vfp_expand_imm
Backports commit e90a99fe6bde9b85bff8c052ade51520f20d9bce from qemu.
2018-02-07 09:44:52 -05:00
Lioncash 4c165ed788
translate-a64: Silence unused variable warning 2018-02-06 08:38:01 -05:00
Merry 29d38d7c22
Merge pull request #10 from lioncash/el-busto-ldst-exclusive
translate-a64: Backport fix for incorrect load/store exclusive unallocated checks
2018-02-05 20:59:25 +00:00
Merry b7bb608197
Merge pull request #9 from lioncash/ia64
tcg: Drop ia64 host support
2018-02-05 20:59:18 +00:00
Merry 82c4212ce3
Merge pull request #8 from lioncash/optimize
Backport REV16 optimizations from qemu
2018-02-05 20:58:58 +00:00
Lioncash 1e451b386a
translate-a64: Backport fix for incorrect load/store exclusive unallocated checks
Backports commit e14f0eb12f920fd96b9f79d15cedd437648e8667 from qemu
2018-02-04 23:17:45 -05:00
Lioncash 7f665d8c1e
tcg: Drop ia64 host support
Backports commit a46c1244a0d65d5f37fc12e4d42f2479eac87b52 from qemu
2018-02-04 18:33:02 -05:00
Lioncash 5a37b8c28e
Backport optimizations to AArch32's REV16 handling
Backports commit 68cedf733ae32363ccf54f0b52c8a424d5ec98ed from qemu
2018-02-04 14:53:28 -05:00
Lioncash 4a8a92bad2
Backport optimizations to AArch64's REV16 handling
Backports commits abb1066df313602ef0ca631126bd342d399d5359 and e4256c3cbf7eefebc0bc6e1f472c47c6dd20b996 from qemu.
2018-02-04 14:45:39 -05:00
Lioncash 122d54e23e
Backport the SVE feature flag
Backports commit 0d0a16c647650d476219a5e1313dec434f9fbebb in qemu to unicorn
2018-02-02 08:52:15 -05:00
Lioncash 4fb2fbfacf
Backport the JAZELLE feature flag
Backports commit c99a55d38dd5b5131f3fcbbaf41828a09ee62544 in qemu to unicorn
2018-02-02 08:50:18 -05:00
Lioncash 84319130cd
Backport the M_SECURITY feature flag
Backports relevant parts from commit 1e577cc7cffd3de14dbd321de5c3ef191c6ab07f in qemu to unicorn
2018-02-02 08:44:46 -05:00
Lioncash 20038fb801
Backport the PMU feature flag
Backports the applicable code from commit 929e754d5a621cd53f30e69b766ccf381b58d124 to unicorn
2018-02-02 08:28:27 -05:00
Lioncash 35100ce4e0
Backport the VBAR feature flag
Backports commit 91db4642f868cf2e591b62d31a19d35b02ea791e from qemu to unicorn
2018-02-02 08:24:12 -05:00
Lioncash 291b5753eb
Backport the THUMB_DSP feature flag
Backports commit 62b44f059a84d1ac580a653fc4110dfabaef6b83 in qemu to unicorn.
2018-02-02 07:59:26 -05:00
Lioncash 438e2836e0
helper_a64: Fix CRC32's implementation 2018-01-29 09:24:36 -05:00
Lioncash d41b200fd4
A64: Add EOR3 and BCAX support
Backported to unicorn from: https://lists.nongnu.org/archive/html/qemu-devel/2018-01/msg05003.html
2018-01-25 21:18:36 -05:00
MerryMage 4128f3b259 aarch64: Add FPCR and FPSR registers 2018-01-16 17:37:47 +00:00
MerryMage f90c819a33 aarch64: Add pstate pseudoregister 2018-01-16 17:37:17 +00:00
bunnei 73f4573535 aarch64: Add exception syndrome pseudo register. 2018-01-03 19:41:12 -05:00
Nguyen Anh Quynh d5f83a9c2e arm: cleanup for ARM_CPU 2017-12-21 09:43:33 +08:00
Nguyen Anh Quynh e67be36c88 arm: remove unused variable in arm_cpu_get_phys_page_debug() 2017-12-20 22:12:35 +08:00
Nguyen Anh Quynh 3e0d0cfab7 i386: fix signed int overflow in #923 & #924 2017-12-16 10:28:45 +08:00
Andrew Dutcher d7735487f7 Use the qemu helpers to get/set the x86 eflags (#878) 2017-09-15 22:18:38 +07:00
Andrew Dutcher 363cbacee4 Only set eip to the instruction pointer after an interrupt if the interrupt was user-generated (#875) 2017-08-29 17:14:36 +07:00
darkf 42d0632108 Fix typo in ARM tcg-target.c (#859) 2017-07-22 23:36:38 +08:00
vardyh ad767abda8 x86::trans: handle illegal case for opc c6/c7
Reference Intel software developer manual vol2 Appendix A Table A-6 for
detailed decoding information.

Signed-off-by: vardyh <vardyh.dev@gmail.com>
2017-05-25 15:22:45 +08:00
misson20000 014ccfb94a Aarch64 add thread registers (#834)
* add thread registers to AArch64

* update bindings to add AArch64 thread registers

* fix indentation for register read/write switch-case in unicorn_aarch64.c
2017-05-14 14:42:49 +07:00
bulaza 4b9efdc986 Adding INSN hook checks for x86 (#833)
* adding INSN hook checking for x86

* tabs to spaces

* need to return bool not uc_err

* fixed conditional after switching to bool
2017-05-14 00:16:17 +07:00
Ryan Hileman ae6ea3b91d fix arm64 hang (fix #827) (#828) 2017-05-09 20:19:32 +08:00
Samuel Groß 5385baba39 Implemented read and write access to the YMM registers (#819) 2017-05-05 09:02:58 +08:00
zhangwm 4a62409949 arm64eb: arm64 big endian also using little endian instructions. (#816)
* arm64eb: arm64 big endian also using little endian instructions.

* arm64: using another example that depends on endians.

example:
1. store a word: 0x12345678
2. load a byte:
   * little endian : 0x78
   * big endian    : 0x12
2017-05-04 20:00:48 +08:00
Ryan Hileman 1b00d3f89a remove slow cpu QOM casts (#815) 2017-05-02 14:56:39 +08:00
Ryan Hileman 187b470245 add arm64 CPACR_EL1 register support (#814) 2017-05-02 14:51:19 +08:00
zhangwm 2e973a13f0 arm64eb: add support for ARM64 big endian. 2017-04-24 23:30:01 +08:00
Nguyen Anh Quynh 513075e061 arm: fix an warning reported by GCC 2017-04-21 21:12:57 +08:00
Nguyen Anh Quynh e917c9de10 Merge branch 'master' into msvc2 2017-04-21 01:17:00 +08:00
0xSeb 605400e10e determine correct Thumb/Thumb2 instruction size (16/32-bit) for code … (#796)
* determine correct Thumb/Thumb2 instruction size (16/32-bit) for code hook

* determine correct Thumb/Thumb2 instruction size (16/32-bit) for code hook

* determine correct Thumb/Thumb2 instruction size (16/32-bit) for code hook
2017-04-15 00:39:56 +08:00
Nguyen Anh Quynh f915f14e74 Merge branch 'master' of https://github.com/unicorn-engine/unicorn 2017-04-12 22:06:40 +08:00
Nguyen Anh Quynh cb44f77ac3 mips: fix uc_reg_read() for MIPS64 2017-04-12 22:06:26 +08:00
Nguyen Anh Quynh 3315f288d3 fix an warning in glib_compat.c 2017-04-12 14:01:58 +08:00
bunnei 4eca426fb6 unicorn_aarch64: Expose UC_ARM64_REG_NZCV register. (#791) 2017-03-31 10:21:45 +08:00
Nguyen Anh Quynh 094ca80092 fix conflicts 2017-03-30 12:23:24 +08:00
zhangwm ccdb0ff523 armeb: rename arm's and mips's *REGS_STORAGE_SIZE to avoid big-endian and little-endian's duplicated definition. 2017-03-15 22:25:35 +08:00
Nguyen Anh Quynh a267af7d95 add arm_release to qemu/header_gen.py, and regenerate qemu/armeb.h 2017-03-14 23:41:31 +08:00
zhangwm d8fe34a2e8 armeb: Add support for ARM big endian. 2017-03-13 22:32:44 +08:00
Nguyen Anh Quynh c01dcf0a14 fix merge conflicts 2017-03-10 21:04:33 +08:00
feliam 0150ca24b1 Add support for ARM application flags - APSR register (#776) 2017-03-09 22:28:03 +08:00
Matt Thomas 2749b8412e fix register widths for MIPS64 reg_read/write (#775)
* fix register widths for MIPS64 reg_read/write

* fix preprocessor typedef error for qemu/target-mips
2017-03-08 08:40:30 +08:00
stevielavern b3a5eae81c uc_reg_read & uc_reg_write now support ARM64 Neon registers (#774)
* uc_reg_read & uc_reg_write now support ARM64 Neon registers

* Do not reuse uc_x86_xmm for uc_arm64_neon128. TODO: refactor both classes to use the same parent.
2017-03-07 21:29:34 +08:00
Nguyen Anh Quynh c3808179e1 another attempt to fix #766 2017-02-26 15:22:24 +08:00
Nguyen Anh Quynh e65fef70dc add missing TCG context arg to few functions in tcg.c. see #766 2017-02-26 09:47:40 +08:00
Nguyen Anh Quynh d52f85d16e add back missing ELF symbols reported in #766 2017-02-26 09:39:11 +08:00
Ahmed Samy 02e6c14e12 x86: add MSR API via reg API (#755)
Writing / reading to model specific registers should be as easy as
calling a function, it's a bit stupid to write shell code and run them
just to write/read to a MSR, and even worse, you need more than just a
shellcode to read...

So, add a special register ID called UC_X86_REG_MSR, which should be
passed to uc_reg_write()/uc_reg_read() as the register ID, and then a
data structure which is uc_x86_msr (12 bytes), as the value (always), where:
	Byte	Value		Size
	0	MSR ID		4
	4       MSR val		8
2017-02-24 21:37:19 +08:00
Nguyen Anh Quynh f3ada41b99 fix the last fix that crashes samples 2017-02-24 20:34:52 +08:00
Nguyen Anh Quynh 7c29558a95 msvc: fix a warning in qemu/exec.c when merging master to msvc 2017-02-24 19:29:55 +08:00
Nguyen Anh Quynh 6ea39f7d5a merge msvc with master 2017-02-24 10:39:36 +08:00
Nguyen Anh Quynh e7ecbf7889 m68k: fix a compilation warning 2017-02-23 20:34:17 +08:00
Nguyen Anh Quynh 714cf2c609 arm: fix a warning 2017-02-23 20:32:09 +08:00
Nguyen Anh Quynh 736d9857d2 recover some ELF symbols for building on Arm, PPC, Sparc & S390. issue #752 2017-02-20 15:16:50 +08:00
Chris Eagle a03e908611 Fix initial state of segment registers (#751)
* Remove glib from samples makefile

* changes to 16 bit segment registers needs to update segment base as well as segment selector

* change how x86 segment registers are set in 16-bit mode

* more appropriate solution to initial state of x86 segment registers in 16-bit mode

* remove commented lines
2017-02-09 23:49:54 +08:00
Chris Eagle f05984961b Fix 16-bit address computations (#747)
* Remove glib from samples makefile

* changes to 16 bit segment registers needs to update segment base as well as segment selector

* change how x86 segment registers are set in 16-bit mode
2017-02-08 09:37:41 +08:00
vardyh 7f9251511e MSVC port (vardyh) (#746)
* unicorn: use waitable timer to implement usleep() on Windows

Signed-off-by: vardyh <vardyh.dev@gmail.com>

* atomic: implement barrier() for msvc

Signed-off-by: vardyh <vardyh.dev@gmail.com>
2017-02-07 21:31:35 +08:00
Parker Thompson 053ecd7bf4 Added ARM coproc registers (#684)
* Added ARM coproc registers

* Added regression test for vfp
2017-01-25 11:56:19 +08:00
Nguyen Anh Quynh ef52d9a9d1 cleanup qemu/include/qemu/module.h 2017-01-25 00:20:08 +08:00
xorstream e08d1bf7c6 Arm issue fix. (#738)
* Fix for MIPS issue.

* Sparc support added.

* M68K support added.

* Arm support ported.

* Fix issue with VS2015 shlobj.h file

* Arm issue fix.
2017-01-24 17:45:01 +08:00
xorstream 8e45102b43 Arm support ported. (#736)
* Fix for MIPS issue.

* Sparc support added.

* M68K support added.

* Arm support ported.

* Fix issue with VS2015 shlobj.h file
2017-01-23 23:30:57 +08:00
xorstream 2695a0ffe8 M68K support added. (#735)
* Fix for MIPS issue.

* Sparc support added.

* M68K support added.
2017-01-23 14:40:02 +08:00
xorstream a40921ce32 Sparc support added. (#734)
* Fix for MIPS issue.

* Sparc support added.
2017-01-23 13:29:41 +08:00
xorstream 69ae8f7987 Fix for MIPS issue. (#733) 2017-01-23 12:39:34 +08:00
Nguyen Anh Quynh 2ecbe89cc1 cleanup Sparc unused code 2017-01-23 12:34:00 +08:00
Nguyen Anh Quynh e4c7c3dbe4 cleanup Sparc unused code 2017-01-23 12:33:39 +08:00
Nguyen Anh Quynh 0680b85920 cleanup Monitor related code 2017-01-23 10:07:01 +08:00
Nguyen Anh Quynh 81b8a685be cleanup 2017-01-23 10:06:49 +08:00
Nguyen Anh Quynh 55d472c62c cleanup Monitor related code 2017-01-23 00:53:31 +08:00
Nguyen Anh Quynh b3faed1df9 cleanup 2017-01-23 00:30:13 +08:00
Nguyen Anh Quynh a95fdbc5aa cleanup qemu/include/exec/memory.h 2017-01-22 23:21:47 +08:00
Nguyen Anh Quynh 5de0785a1b cleanup qemu/memory.c 2017-01-22 23:07:17 +08:00
xorstream e46f86c80b Merging with current msvc. 2017-01-23 01:07:06 +11:00
xorstream 72a497bc14 Added MIPS support and projects for all samples. 2017-01-23 01:05:08 +11:00
Nguyen Anh Quynh 206819bd98 cleanup after msvc port 2017-01-22 21:27:17 +08:00
xorstream 1a9ebbecde isnan() fix for msvc2013 onwards (#729)
* Changed some MSVC compatibility defines based on MSVC version.

* Added prebuild_script.bat to remove leftover configure generated files before building.

Also added project files and MSVC copies of configure generated files for all supported CPUs.

* Moved ./bindings/msvc_native into ./msvc

* Remove old project dir.

* isnan() fix for msvc2013 onwards
2017-01-22 16:14:05 +08:00
xorstream 03dcce40b2 isnan() fix for msvc2013 onwards 2017-01-22 18:13:28 +11:00
Nguyen Anh Quynh 49c904a629 cleanup qemu/configure 2017-01-22 05:57:29 +08:00
Nguyen Anh Quynh d04cc8671d cleanup qemu/configure 2017-01-22 05:56:37 +08:00
Nguyen Anh Quynh 2a1b9d8e1b cleanup qemu/Makefile.objs 2017-01-21 21:50:12 +08:00
xorstream 9fac29d154 Changed some MSVC compatibility defines based on MSVC version. (#724) 2017-01-21 20:21:27 +08:00
Nguyen Anh Quynh 0d51163abc cleanup qemu/util/qemu-timer-common.c 2017-01-21 14:55:35 +08:00
Nguyen Anh Quynh 45717c61ba cleanup qemu/util/qemu-timer-common.c 2017-01-21 14:53:33 +08:00
Nguyen Anh Quynh 647c97ddc3 ffs() is redundant 2017-01-21 11:11:22 +08:00
Nguyen Anh Quynh 5d0797afe7 ffs() is redundant 2017-01-21 11:10:48 +08:00
Nguyen Anh Quynh c8550b86f0 fix conflicts 2017-01-21 11:06:05 +08:00
Nguyen Anh Quynh fa12120d75 termios.h & strings.h are not needed 2017-01-21 11:02:17 +08:00
xorstream 770c5616e2 Automated leading tab to spaces conversion. 2017-01-21 12:28:22 +11:00