Paolo Bonzini
cfc9356a8e
tcg/aarch64: use 32-bit offset for 32-bit user-mode emulation
...
Thanks to the previous patch, it is now easy for tcg_out_qemu_ld and
tcg_out_qemu_st to use a 32-bit zero extended offset. However, the
guest base register x28 must be the base and addr_reg must be the
index.
Backports commit ffc6372851d8631a9f9fa56ec613b3244dc635b9 from qemu
2018-02-10 20:55:51 -05:00
Paolo Bonzini
85bac3c96d
tcg/aarch64: add ext argument to tcg_out_insn_3310
...
The new argument lets you pick uxtw or uxtx mode for the offset
register. For now, all callers pass TCG_TYPE_I64 so that uxtx
is generated. The bits for uxtx are removed from I3312_TO_I3310.
Backports commit 6c0f0c0f124718650a8d682ba275044fc02f6fe2 from qemu
2018-02-10 20:51:37 -05:00
Richard Henderson
95e666c547
tcg/i386: Extend addresses for 32-bit guests
...
Removing the ??? comment explaining why it (mostly) worked.
Backports commit ee8ba9e4d8458b8bba5455a7ae704620c4f2ef4b from qemu
2018-02-10 20:42:33 -05:00
Richard Henderson
17c1f027c1
tcg: Handle MO_AMASK in tcg_dump_ops
...
Backports commit 59c4b7e8dfab0cdc41434fedbf2686222f541e57 from qemu
2018-02-10 20:32:52 -05:00
Richard Henderson
c5a2a50c06
tcg: Mask TCGMemOp appropriately for indexing
...
The addition of MO_AMASK means that places that used inverted masks
need to be changed to use positive masks, and places that failed to
mask the intended bits need updating.
Backports commit 2b7ec66f025263a5331f37d5ad78a625496fd7bd from qemu
2018-02-10 20:29:36 -05:00
Richard Henderson
336833c11e
tcg: Add MO_ALIGN, MO_UNALN
...
These modifiers control, on a per-memory-op basis, whether
unaligned memory accesses are allowed. The default setting
reflects the target's definition of ALIGNED_ONLY.
Backports commit dfb36305626636e2e07e0c5acd3a002a5419399e from qemu
2018-02-10 20:18:53 -05:00
Richard Henderson
ac713c7034
tcg: Push merged memop+mmu_idx parameter to softmmu routines
...
The extra information is not yet used but it is now available.
This requires minor changes through all of the tcg backends.
Backports commit 3972ef6f830d65e9bacbd31257abedc055fd6dc8 from qemu
2018-02-10 20:03:22 -05:00
Richard Henderson
6234d07489
tcg: Merge memop and mmu_idx parameters to qemu_ld/st
...
At the tcg opcode level, not at the tcg-op.h generator level.
This requires minor changes through all of the tcg backends,
but none of the cpu translators.
Backports commit 59227d5d45bb3c31dc2118011691c35b3c00879c from qemu
2018-02-10 19:01:49 -05:00
Richard Henderson
7532c92358
tcg/optimize: Handle or r,a,a with constant a
...
Backports commit 2374c4b8375072da1f401c6daccc68ae76c73e63 from qemu
2018-02-09 14:56:12 -05:00
Richard Henderson
e0d99a1a06
tcg: Complete handling of ALWAYS and NEVER
...
Missing from movcond, and brcondi_i32 (but not brcondi_i64).
Backports commit 37ed3bf1ee07bb1a26adca0df8718f601f231c0b from qemu
2018-02-09 14:52:21 -05:00
Richard Henderson
6bd102ba86
tcg: Use tcg_malloc to allocate TCGLabel
...
Pre-allocating 512 of them per TB is a waste.
Backports commit 51e3972c41598adc91fe3f4767057f5198dcc15c from qemu
2018-02-09 14:48:20 -05:00
Richard Henderson
00b0a50f47
tcg: Change generator-side labels to a pointer
...
This is less about improved type checking than enabling a
subsequent change to the representation of labels.
Backports commit bec1631100323fac0900aea71043d5c4e22fc2fa from qemu
2018-02-09 14:40:59 -05:00
Richard Henderson
232632e76c
tcg: Change translator-side labels to a pointer
...
This is improved type checking for the translators -- it's no longer
possible to accidentally swap arguments to the branch functions.
Note that the code generating backends still manipulate labels as int.
With notable exceptions, the scope of the change is just a few lines
for each target, so it's not worth building extra machinery to do this
change in per-target increments.
Backports commit 42a268c241183877192c376d03bd9b6d527407c7 from qemu
2018-02-09 14:17:56 -05:00
Richard Henderson
255a160c66
tcg: Remove unused opcodes
...
We no longer need INDEX_op_end to terminate the list, nor do we
need 5 forms of nop, since we just remove the TCGOp instead.
Backports commit 15fc7daa770764cc795158cbb525569f156f3659 from qemu
2018-02-09 13:20:41 -05:00
Richard Henderson
70f28c8bd5
tcg: Implement insert_op_before
...
Rather reserving space in the op stream for optimization,
let the optimizer add ops as necessary.
Backports commit a4ce099a7a4b4734c372f6bf28f3362e370f23c1 from qemu
2018-02-09 13:11:50 -05:00
Richard Henderson
4fcaabf38c
tcg: Remove opcodes instead of noping them out
...
With the linked list scheme we need not leave nops in the stream
that we need to process later.
Backports commit 0c627cdca20155753a536c51385abb73941a59a0 from qemu
2018-02-09 13:03:58 -05:00
Lioncash
0273e6ae18
tcg: Put opcodes in a linked list
...
The previous setup required ops and args to be completely sequential,
and was error prone when it came to both iteration and optimization.
2018-02-09 12:54:05 -05:00
Richard Henderson
a41b9acc0c
tcg: Introduce tcg_op_buf_count and tcg_op_buf_full
...
The method by which we count the number of ops emitted
is going to change. Abstract that away into some inlines.
Backports commit fe700adb3db5b028b504423b946d4ee5200a8f2f from qemu.
2018-02-09 09:31:17 -05:00
Richard Henderson
78378289e3
tcg: Move emit of INDEX_op_end into gen_tb_end
...
Backports commit 0a7df5da986bd7ee0789f2d7b8611f2e8eee5046 from qemu
2018-02-09 08:51:01 -05:00
Richard Henderson
4d46959c3b
tcg: Reduce ifdefs in tcg-op.c
...
Almost completely eliminates the ifdefs in this file, improving
confidence in the lesser used 32-bit builds.
Backports commit 3a13c3f34ce2058e0c2decc3b0f9f56be24c9400 from qemu
2018-02-09 08:35:52 -05:00
Richard Henderson
500c546444
tcg: Move some opcode generation functions out of line
...
Some of these functions are really quite large. We have a number of
things that ought to be circularly dependent, but we duplicated code
to break that chain for the inlines.
This saved 25% of the code size of one of the translators I examined.
2018-02-09 08:10:00 -05:00
Richard Henderson
cb7b19ad26
tcg: Change ts->mem_reg to ts->mem_base
...
Chain the temporaries together via pointers intstead of indices.
The mem_reg value is now mem_base->reg. This will be important later.
This does require that the frame pointer have a global temporary
allocated for it. This is simple bar the existing reserved_regs check.
Backports commit b3a62939561e07bc34493444fa926b6137cba4e8 from qemu
2018-02-08 13:04:48 -05:00
Richard Henderson
6b4b493dae
tcg: Change tcg_global_mem_new_* to take a TCGv_ptr
...
Thus, use cpu_env as the parameter, not TCG_AREG0 directly.
Update all uses in the translators.
Backports commit e1ccc05444676b92c63708096e36582be27fbee1 from qemu
2018-02-08 12:33:33 -05:00
Richard Henderson
afb67fc002
target/arm: Fix aa64 ldp register writeback
...
Backports commit 3e4d91b94ce400326fae0850578d9e9f30a71adb from qemu
2018-02-08 08:29:51 -05:00
Eric Blake
37cdcbf771
maint: Fix macros with broken 'do/while(0); ' usage
2018-02-07 20:27:37 -05:00
Lioncash
0f453b0595
target/arm: Add aa{32, 64}_vfp_{dreg, qreg} helpers
...
Backports commit 9a2b5256ea1f68c89d5da4b54f180f576c2c82d6 from qemu
2018-02-07 10:09:26 -05:00
Lioncash
dd577f5ea5
target/arm: Change the type of vfp.regs
...
Backports commit 3f68b8a5a6862f856524bb347bf348ae364dd43c from qemu
2018-02-07 09:57:43 -05:00
Lioncash
ef07c136b6
target/arm: Add fp16 support to vfp_expand_imm
...
Backports commit 8081796a75414f9ed5ec3d97158e543ed45908ec from qemu.
2018-02-07 09:47:04 -05:00
Lioncash
b55f35ba92
target/arm: Split out vfp_expand_imm
...
Backports commit e90a99fe6bde9b85bff8c052ade51520f20d9bce from qemu.
2018-02-07 09:44:52 -05:00
Lioncash
4c165ed788
translate-a64: Silence unused variable warning
2018-02-06 08:38:01 -05:00
Merry
29d38d7c22
Merge pull request #10 from lioncash/el-busto-ldst-exclusive
...
translate-a64: Backport fix for incorrect load/store exclusive unallocated checks
2018-02-05 20:59:25 +00:00
Merry
b7bb608197
Merge pull request #9 from lioncash/ia64
...
tcg: Drop ia64 host support
2018-02-05 20:59:18 +00:00
Merry
82c4212ce3
Merge pull request #8 from lioncash/optimize
...
Backport REV16 optimizations from qemu
2018-02-05 20:58:58 +00:00
Lioncash
1e451b386a
translate-a64: Backport fix for incorrect load/store exclusive unallocated checks
...
Backports commit e14f0eb12f920fd96b9f79d15cedd437648e8667 from qemu
2018-02-04 23:17:45 -05:00
Lioncash
7f665d8c1e
tcg: Drop ia64 host support
...
Backports commit a46c1244a0d65d5f37fc12e4d42f2479eac87b52 from qemu
2018-02-04 18:33:02 -05:00
Lioncash
5a37b8c28e
Backport optimizations to AArch32's REV16 handling
...
Backports commit 68cedf733ae32363ccf54f0b52c8a424d5ec98ed from qemu
2018-02-04 14:53:28 -05:00
Lioncash
4a8a92bad2
Backport optimizations to AArch64's REV16 handling
...
Backports commits abb1066df313602ef0ca631126bd342d399d5359 and e4256c3cbf7eefebc0bc6e1f472c47c6dd20b996 from qemu.
2018-02-04 14:45:39 -05:00
Lioncash
122d54e23e
Backport the SVE feature flag
...
Backports commit 0d0a16c647650d476219a5e1313dec434f9fbebb in qemu to unicorn
2018-02-02 08:52:15 -05:00
Lioncash
4fb2fbfacf
Backport the JAZELLE feature flag
...
Backports commit c99a55d38dd5b5131f3fcbbaf41828a09ee62544 in qemu to unicorn
2018-02-02 08:50:18 -05:00
Lioncash
84319130cd
Backport the M_SECURITY feature flag
...
Backports relevant parts from commit 1e577cc7cffd3de14dbd321de5c3ef191c6ab07f in qemu to unicorn
2018-02-02 08:44:46 -05:00
Lioncash
20038fb801
Backport the PMU feature flag
...
Backports the applicable code from commit 929e754d5a621cd53f30e69b766ccf381b58d124 to unicorn
2018-02-02 08:28:27 -05:00
Lioncash
35100ce4e0
Backport the VBAR feature flag
...
Backports commit 91db4642f868cf2e591b62d31a19d35b02ea791e from qemu to unicorn
2018-02-02 08:24:12 -05:00
Lioncash
291b5753eb
Backport the THUMB_DSP feature flag
...
Backports commit 62b44f059a84d1ac580a653fc4110dfabaef6b83 in qemu to unicorn.
2018-02-02 07:59:26 -05:00
Lioncash
438e2836e0
helper_a64: Fix CRC32's implementation
2018-01-29 09:24:36 -05:00
Lioncash
d41b200fd4
A64: Add EOR3 and BCAX support
...
Backported to unicorn from: https://lists.nongnu.org/archive/html/qemu-devel/2018-01/msg05003.html
2018-01-25 21:18:36 -05:00
MerryMage
4128f3b259
aarch64: Add FPCR and FPSR registers
2018-01-16 17:37:47 +00:00
MerryMage
f90c819a33
aarch64: Add pstate pseudoregister
2018-01-16 17:37:17 +00:00
bunnei
73f4573535
aarch64: Add exception syndrome pseudo register.
2018-01-03 19:41:12 -05:00
Nguyen Anh Quynh
d5f83a9c2e
arm: cleanup for ARM_CPU
2017-12-21 09:43:33 +08:00
Nguyen Anh Quynh
e67be36c88
arm: remove unused variable in arm_cpu_get_phys_page_debug()
2017-12-20 22:12:35 +08:00
Nguyen Anh Quynh
3e0d0cfab7
i386: fix signed int overflow in #923 & #924
2017-12-16 10:28:45 +08:00
Andrew Dutcher
d7735487f7
Use the qemu helpers to get/set the x86 eflags ( #878 )
2017-09-15 22:18:38 +07:00
Andrew Dutcher
363cbacee4
Only set eip to the instruction pointer after an interrupt if the interrupt was user-generated ( #875 )
2017-08-29 17:14:36 +07:00
darkf
42d0632108
Fix typo in ARM tcg-target.c ( #859 )
2017-07-22 23:36:38 +08:00
vardyh
ad767abda8
x86::trans: handle illegal case for opc c6/c7
...
Reference Intel software developer manual vol2 Appendix A Table A-6 for
detailed decoding information.
Signed-off-by: vardyh <vardyh.dev@gmail.com>
2017-05-25 15:22:45 +08:00
misson20000
014ccfb94a
Aarch64 add thread registers ( #834 )
...
* add thread registers to AArch64
* update bindings to add AArch64 thread registers
* fix indentation for register read/write switch-case in unicorn_aarch64.c
2017-05-14 14:42:49 +07:00
bulaza
4b9efdc986
Adding INSN hook checks for x86 ( #833 )
...
* adding INSN hook checking for x86
* tabs to spaces
* need to return bool not uc_err
* fixed conditional after switching to bool
2017-05-14 00:16:17 +07:00
Ryan Hileman
ae6ea3b91d
fix arm64 hang ( fix #827 ) ( #828 )
2017-05-09 20:19:32 +08:00
Samuel Groß
5385baba39
Implemented read and write access to the YMM registers ( #819 )
2017-05-05 09:02:58 +08:00
zhangwm
4a62409949
arm64eb: arm64 big endian also using little endian instructions. ( #816 )
...
* arm64eb: arm64 big endian also using little endian instructions.
* arm64: using another example that depends on endians.
example:
1. store a word: 0x12345678
2. load a byte:
* little endian : 0x78
* big endian : 0x12
2017-05-04 20:00:48 +08:00
Ryan Hileman
1b00d3f89a
remove slow cpu QOM casts ( #815 )
2017-05-02 14:56:39 +08:00
Ryan Hileman
187b470245
add arm64 CPACR_EL1 register support ( #814 )
2017-05-02 14:51:19 +08:00
zhangwm
2e973a13f0
arm64eb: add support for ARM64 big endian.
2017-04-24 23:30:01 +08:00
Nguyen Anh Quynh
513075e061
arm: fix an warning reported by GCC
2017-04-21 21:12:57 +08:00
Nguyen Anh Quynh
e917c9de10
Merge branch 'master' into msvc2
2017-04-21 01:17:00 +08:00
0xSeb
605400e10e
determine correct Thumb/Thumb2 instruction size (16/32-bit) for code … ( #796 )
...
* determine correct Thumb/Thumb2 instruction size (16/32-bit) for code hook
* determine correct Thumb/Thumb2 instruction size (16/32-bit) for code hook
* determine correct Thumb/Thumb2 instruction size (16/32-bit) for code hook
2017-04-15 00:39:56 +08:00
Nguyen Anh Quynh
f915f14e74
Merge branch 'master' of https://github.com/unicorn-engine/unicorn
2017-04-12 22:06:40 +08:00
Nguyen Anh Quynh
cb44f77ac3
mips: fix uc_reg_read() for MIPS64
2017-04-12 22:06:26 +08:00
Nguyen Anh Quynh
3315f288d3
fix an warning in glib_compat.c
2017-04-12 14:01:58 +08:00
bunnei
4eca426fb6
unicorn_aarch64: Expose UC_ARM64_REG_NZCV register. ( #791 )
2017-03-31 10:21:45 +08:00
Nguyen Anh Quynh
094ca80092
fix conflicts
2017-03-30 12:23:24 +08:00
zhangwm
ccdb0ff523
armeb: rename arm's and mips's *REGS_STORAGE_SIZE to avoid big-endian and little-endian's duplicated definition.
2017-03-15 22:25:35 +08:00
Nguyen Anh Quynh
a267af7d95
add arm_release to qemu/header_gen.py, and regenerate qemu/armeb.h
2017-03-14 23:41:31 +08:00
zhangwm
d8fe34a2e8
armeb: Add support for ARM big endian.
2017-03-13 22:32:44 +08:00
Nguyen Anh Quynh
c01dcf0a14
fix merge conflicts
2017-03-10 21:04:33 +08:00
feliam
0150ca24b1
Add support for ARM application flags - APSR register ( #776 )
2017-03-09 22:28:03 +08:00
Matt Thomas
2749b8412e
fix register widths for MIPS64 reg_read/write ( #775 )
...
* fix register widths for MIPS64 reg_read/write
* fix preprocessor typedef error for qemu/target-mips
2017-03-08 08:40:30 +08:00
stevielavern
b3a5eae81c
uc_reg_read & uc_reg_write now support ARM64 Neon registers ( #774 )
...
* uc_reg_read & uc_reg_write now support ARM64 Neon registers
* Do not reuse uc_x86_xmm for uc_arm64_neon128. TODO: refactor both classes to use the same parent.
2017-03-07 21:29:34 +08:00
Nguyen Anh Quynh
c3808179e1
another attempt to fix #766
2017-02-26 15:22:24 +08:00
Nguyen Anh Quynh
e65fef70dc
add missing TCG context arg to few functions in tcg.c. see #766
2017-02-26 09:47:40 +08:00
Nguyen Anh Quynh
d52f85d16e
add back missing ELF symbols reported in #766
2017-02-26 09:39:11 +08:00
Ahmed Samy
02e6c14e12
x86: add MSR API via reg API ( #755 )
...
Writing / reading to model specific registers should be as easy as
calling a function, it's a bit stupid to write shell code and run them
just to write/read to a MSR, and even worse, you need more than just a
shellcode to read...
So, add a special register ID called UC_X86_REG_MSR, which should be
passed to uc_reg_write()/uc_reg_read() as the register ID, and then a
data structure which is uc_x86_msr (12 bytes), as the value (always), where:
Byte Value Size
0 MSR ID 4
4 MSR val 8
2017-02-24 21:37:19 +08:00
Nguyen Anh Quynh
f3ada41b99
fix the last fix that crashes samples
2017-02-24 20:34:52 +08:00
Nguyen Anh Quynh
7c29558a95
msvc: fix a warning in qemu/exec.c when merging master to msvc
2017-02-24 19:29:55 +08:00
Nguyen Anh Quynh
6ea39f7d5a
merge msvc with master
2017-02-24 10:39:36 +08:00
Nguyen Anh Quynh
e7ecbf7889
m68k: fix a compilation warning
2017-02-23 20:34:17 +08:00
Nguyen Anh Quynh
714cf2c609
arm: fix a warning
2017-02-23 20:32:09 +08:00
Nguyen Anh Quynh
736d9857d2
recover some ELF symbols for building on Arm, PPC, Sparc & S390. issue #752
2017-02-20 15:16:50 +08:00
Chris Eagle
a03e908611
Fix initial state of segment registers ( #751 )
...
* Remove glib from samples makefile
* changes to 16 bit segment registers needs to update segment base as well as segment selector
* change how x86 segment registers are set in 16-bit mode
* more appropriate solution to initial state of x86 segment registers in 16-bit mode
* remove commented lines
2017-02-09 23:49:54 +08:00
Chris Eagle
f05984961b
Fix 16-bit address computations ( #747 )
...
* Remove glib from samples makefile
* changes to 16 bit segment registers needs to update segment base as well as segment selector
* change how x86 segment registers are set in 16-bit mode
2017-02-08 09:37:41 +08:00
vardyh
7f9251511e
MSVC port (vardyh) ( #746 )
...
* unicorn: use waitable timer to implement usleep() on Windows
Signed-off-by: vardyh <vardyh.dev@gmail.com>
* atomic: implement barrier() for msvc
Signed-off-by: vardyh <vardyh.dev@gmail.com>
2017-02-07 21:31:35 +08:00
Parker Thompson
053ecd7bf4
Added ARM coproc registers ( #684 )
...
* Added ARM coproc registers
* Added regression test for vfp
2017-01-25 11:56:19 +08:00
Nguyen Anh Quynh
ef52d9a9d1
cleanup qemu/include/qemu/module.h
2017-01-25 00:20:08 +08:00
xorstream
e08d1bf7c6
Arm issue fix. ( #738 )
...
* Fix for MIPS issue.
* Sparc support added.
* M68K support added.
* Arm support ported.
* Fix issue with VS2015 shlobj.h file
* Arm issue fix.
2017-01-24 17:45:01 +08:00
xorstream
8e45102b43
Arm support ported. ( #736 )
...
* Fix for MIPS issue.
* Sparc support added.
* M68K support added.
* Arm support ported.
* Fix issue with VS2015 shlobj.h file
2017-01-23 23:30:57 +08:00
xorstream
2695a0ffe8
M68K support added. ( #735 )
...
* Fix for MIPS issue.
* Sparc support added.
* M68K support added.
2017-01-23 14:40:02 +08:00
xorstream
a40921ce32
Sparc support added. ( #734 )
...
* Fix for MIPS issue.
* Sparc support added.
2017-01-23 13:29:41 +08:00
xorstream
69ae8f7987
Fix for MIPS issue. ( #733 )
2017-01-23 12:39:34 +08:00
Nguyen Anh Quynh
2ecbe89cc1
cleanup Sparc unused code
2017-01-23 12:34:00 +08:00
Nguyen Anh Quynh
e4c7c3dbe4
cleanup Sparc unused code
2017-01-23 12:33:39 +08:00
Nguyen Anh Quynh
0680b85920
cleanup Monitor related code
2017-01-23 10:07:01 +08:00
Nguyen Anh Quynh
81b8a685be
cleanup
2017-01-23 10:06:49 +08:00
Nguyen Anh Quynh
55d472c62c
cleanup Monitor related code
2017-01-23 00:53:31 +08:00
Nguyen Anh Quynh
b3faed1df9
cleanup
2017-01-23 00:30:13 +08:00
Nguyen Anh Quynh
a95fdbc5aa
cleanup qemu/include/exec/memory.h
2017-01-22 23:21:47 +08:00
Nguyen Anh Quynh
5de0785a1b
cleanup qemu/memory.c
2017-01-22 23:07:17 +08:00
xorstream
e46f86c80b
Merging with current msvc.
2017-01-23 01:07:06 +11:00
xorstream
72a497bc14
Added MIPS support and projects for all samples.
2017-01-23 01:05:08 +11:00
Nguyen Anh Quynh
206819bd98
cleanup after msvc port
2017-01-22 21:27:17 +08:00
xorstream
1a9ebbecde
isnan() fix for msvc2013 onwards ( #729 )
...
* Changed some MSVC compatibility defines based on MSVC version.
* Added prebuild_script.bat to remove leftover configure generated files before building.
Also added project files and MSVC copies of configure generated files for all supported CPUs.
* Moved ./bindings/msvc_native into ./msvc
* Remove old project dir.
* isnan() fix for msvc2013 onwards
2017-01-22 16:14:05 +08:00
xorstream
03dcce40b2
isnan() fix for msvc2013 onwards
2017-01-22 18:13:28 +11:00
Nguyen Anh Quynh
49c904a629
cleanup qemu/configure
2017-01-22 05:57:29 +08:00
Nguyen Anh Quynh
d04cc8671d
cleanup qemu/configure
2017-01-22 05:56:37 +08:00
Nguyen Anh Quynh
2a1b9d8e1b
cleanup qemu/Makefile.objs
2017-01-21 21:50:12 +08:00
xorstream
9fac29d154
Changed some MSVC compatibility defines based on MSVC version. ( #724 )
2017-01-21 20:21:27 +08:00
Nguyen Anh Quynh
0d51163abc
cleanup qemu/util/qemu-timer-common.c
2017-01-21 14:55:35 +08:00
Nguyen Anh Quynh
45717c61ba
cleanup qemu/util/qemu-timer-common.c
2017-01-21 14:53:33 +08:00
Nguyen Anh Quynh
647c97ddc3
ffs() is redundant
2017-01-21 11:11:22 +08:00
Nguyen Anh Quynh
5d0797afe7
ffs() is redundant
2017-01-21 11:10:48 +08:00
Nguyen Anh Quynh
c8550b86f0
fix conflicts
2017-01-21 11:06:05 +08:00
Nguyen Anh Quynh
fa12120d75
termios.h & strings.h are not needed
2017-01-21 11:02:17 +08:00
xorstream
770c5616e2
Automated leading tab to spaces conversion.
2017-01-21 12:28:22 +11:00
xorstream
df41c49e2d
Fixed warning about {} initialisers.
2017-01-21 11:41:11 +11:00
xorstream
429bfca48e
Fixes for MSVC native support to still work with GCC/GNU.
2017-01-21 01:07:10 +11:00
xorstream
8840d5b42b
Save copies of generated qapi files.
2017-01-21 00:30:50 +11:00
xorstream
fac6a66860
platform.h move #3
2017-01-21 00:13:21 +11:00
xorstream
1aaf57ca54
Some more little edits to prepare for pull request.
2017-01-20 22:46:32 +11:00
xorstream
b0ae2138fb
Merge remote-tracking branch 'unicorn-engine/master' into msvc_native
2017-01-20 22:37:51 +11:00
Nguyen Anh Quynh
ac68745a9c
we dont need to handle VGA & Migration memories
2017-01-20 17:03:39 +08:00
Nguyen Anh Quynh
fff532fc20
timer is redundant
2017-01-20 16:46:58 +08:00
Nguyen Anh Quynh
6daa8581cd
win32_start_routine() looks broken. TODO
2017-01-20 16:12:49 +08:00
xorstream
ee294eebb0
Fixed double free in win32 threads and changed free() to g_free(). ( #722 )
2017-01-20 16:03:35 +08:00
Nguyen Anh Quynh
c6de7930c9
remove mutex code
2017-01-20 15:44:03 +08:00
xorstream
92392e0f57
Merge with current master.
2017-01-20 18:22:28 +11:00
Nguyen Anh Quynh
42771848d6
no more spinlock
2017-01-20 14:57:33 +08:00
Nguyen Anh Quynh
a7fca49f7a
delete qemu/include/qemu/notify.h
2017-01-20 14:47:41 +08:00
xorstream
002151874a
Unicorn interface working with test app in 32bit and 64bit builds.
2017-01-20 17:27:22 +11:00
Nguyen Anh Quynh
b887c3bb25
delete qemu/include/exec/poison.h
2017-01-20 13:58:50 +08:00
Nguyen Anh Quynh
94e55f45c1
del qemu/target-m68k/m68k-semi.c
2017-01-20 11:52:31 +08:00
Nguyen Anh Quynh
b678512fc1
remove kvm stuffs
2017-01-20 01:03:59 +08:00
Nguyen Anh Quynh
7e2234237c
del qemu/scripts/dump-guest-memory.py
2017-01-19 20:56:07 +08:00
xorstream
1aeaf5c40d
This code should now build the x86_x64-softmmu part 2.
2017-01-19 22:50:28 +11:00
Nguyen Anh Quynh
b9b82591a1
cleanup
2017-01-19 18:07:30 +08:00
Nguyen Anh Quynh
8a5b12c6f9
more cleanup in qemu/include/hw/
2017-01-19 15:20:06 +08:00
Nguyen Anh Quynh
287e047fdb
delete sparc32_dma.h & arm-semi.c
2017-01-19 15:10:41 +08:00
Nguyen Anh Quynh
f4f756e6dd
cleanup qemu/include/qemu/module.h
2017-01-19 15:00:25 +08:00
Nguyen Anh Quynh
7789a06d2d
cleanup qemu/default-configs/
2017-01-19 14:52:30 +08:00
Nguyen Anh Quynh
86e5d29b74
more cleanup qemu/configure
2017-01-19 14:15:00 +08:00
Nguyen Anh Quynh
f2691b0107
more cleanup qemu/configure
2017-01-19 14:11:54 +08:00
Nguyen Anh Quynh
37410d02f1
cleanup qemu/configure
2017-01-19 14:02:50 +08:00