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unicorn/qemu/target/arm
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Peter Maydell 32b0e506e6 target/arm: Implement (trivially) ARMv8.2-TTCNP 
The ARMv8.2-TTCNP extension allows an implementation to optimize by
sharing TLB entries between multiple cores, provided that software
declares that it's ready to deal with this by setting a CnP bit in
the TTBRn_ELx. It is mandatory from ARMv8.2 onward.

For QEMU's TLB implementation, sharing TLB entries between different
cores would not really benefit us and would be a lot of work to
implement. So we implement this extension in the "trivial" manner:
we allow the guest to set and read back the CnP bit, but don't change
our behaviour (this is an architecturally valid implementation
choice).

The only code path which looks at the TTBRn_ELx values for the
long-descriptor format where the CnP bit is defined is already doing
enough masking to not get confused when the CnP bit at the bottom of
the register is set, so we can simply add a comment noting why we're
relying on that mask.

Backports commit 41a4bf1feab098da4cd5495cd56a99b0339e2275 from qemu
2020-03-22 02:24:48 -04:00
..
a32-uncond.decode target/arm: Convert Unallocated memory hint 2019-11-28 02:47:41 -05:00
a32.decode target/arm: Convert SVC 2019-11-28 02:46:55 -05:00
arm-powerctl.c arm/arm-powerctl: set NSACR.{CP11, CP10} bits in arm_set_cpu_on() 2020-01-07 18:10:29 -05:00
arm-powerctl.h ARM: Factor out ARM on/off PSCI control functions 2018-03-01 23:31:47 -05:00
arm_ldst.h Fix Thumb-1 BE32 execution and disassembly. 2018-03-02 00:20:11 -05:00
cpu-param.h target/arm: Add mmu_idx for EL1 and EL2 w/ PAN enabled 2020-03-21 17:12:16 -04:00
cpu-qom.h target/arm: Add the hypervisor virtual counter 2020-03-21 15:35:36 -04:00
cpu.c target/arm: Implement (trivially) ARMv8.2-TTCNP 2020-03-22 02:24:48 -04:00
cpu.h target/arm: Implement ARMv8.3-CCIDX 2020-03-22 00:17:37 -04:00
cpu64.c target/arm: Implement (trivially) ARMv8.2-TTCNP 2020-03-22 02:24:48 -04:00
crypto_helper.c target/arm/cpu and crypto_helper: Correct bad merge and adjust to qemu code style 2018-03-12 11:57:24 -04:00
debug_helper.c target/arm: Stop assuming DBGDIDR always exists 2020-03-21 18:26:24 -04:00
helper-a64.c target/arm: Introduce aarch64_pstate_valid_mask 2020-03-21 17:26:00 -04:00
helper-a64.h target/arm: check CF_PARALLEL instead of parallel_cpus 2019-05-04 22:44:32 -04:00
helper-sve.h target/arm: Convert PMULL.8 to gvec 2020-03-21 19:35:46 -04:00
helper.c target/arm: Implement (trivially) ARMv8.2-TTCNP 2020-03-22 02:24:48 -04:00
helper.h target/arm: Convert PMULL.8 to gvec 2020-03-21 19:35:46 -04:00
internals.h target/arm: Move DBGDIDR into ARMISARegisters 2020-03-21 18:29:01 -04:00
iwmmxt_helper.c target/arm: Untabify iwmmxt_helper.c 2018-08-25 04:33:44 -04:00
kvm-consts.h arm: better stub version for MISMATCH_CHECK 2018-03-02 00:13:45 -05:00
m_helper.c target/arm: Add isar_feature_aa32_vfp_simd 2020-03-21 23:11:36 -04:00
Makefile.objs target/arm: Add skeleton for T16 decodetree 2019-11-28 02:50:27 -05:00
neon_helper.c target/arm: Convert PMULL.8 to gvec 2020-03-21 19:35:46 -04:00
op_addsub.h Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
op_helper.c target/arm: Remove CPSR_RESERVED 2020-03-21 17:24:21 -04:00
pauth_helper.c target/arm: Use bit 55 explicitly for pauth 2020-03-21 17:59:06 -04:00
psci.c fix WFI/WFE length in syndrome register 2018-03-05 11:21:51 -05:00
sve.decode target/arm: Sychronize with qemu 2019-04-18 04:49:11 -04:00
sve_helper.c tcg: Use tlb_fill probe from tlb_vaddr_to_host 2019-05-16 18:27:03 -04:00
t16.decode target/arm: Convert T16, long branches 2019-11-28 02:53:54 -05:00
t32.decode target/arm: Convert TT 2019-11-28 02:48:06 -05:00
tlb_helper.c target/arm: Return correct IL bit in merge_syn_data_abort 2020-03-21 12:08:05 -04:00
translate-a64.c target/arm: Implement v8.4-RCPC 2020-03-22 00:15:46 -04:00
translate-a64.h tcg: TCGMemOp is now accelerator independent MemOp 2019-11-28 03:01:12 -05:00
translate-sve.c tcg: TCGMemOp is now accelerator independent MemOp 2019-11-28 03:01:12 -05:00
translate-vfp.inc.c target/arm: Split VMINMAXNM decode 2020-03-22 00:09:53 -04:00
translate.c target/arm: Move the vfp decodetree calls next to the base isa 2020-03-21 23:54:56 -04:00
translate.h target/arm: Vectorize USHL and SSHL 2020-03-21 19:14:17 -04:00
unicorn.h Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
unicorn_aarch64.c unicorn_aarch64: Use aa64_vfp_qreg instead of aa32_vfp_dreg 2018-09-03 07:47:40 +01:00
unicorn_arm.c Add implementation of access to the ARM SPSR register. (#1178) 2020-01-14 09:57:55 -05:00
vec_helper.c target/arm: Convert PMULL.8 to gvec 2020-03-21 19:35:46 -04:00
vfp-uncond.decode target/arm: Split VMINMAXNM decode 2020-03-22 00:09:53 -04:00
vfp.decode target/arm: Split VFM decode 2020-03-22 00:07:53 -04:00
vfp_helper.c target/arm: Add isar_feature_any_fp16 and document naming/usage conventions 2020-03-21 18:12:02 -04:00