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Peter Maydell c6041bf94b
target/arm: Avoid bogus NSACR traps on M-profile without Security Extension 
In Arm v8.0 M-profile CPUs without the Security Extension and also in
v7M CPUs, there is no NSACR register. However, the code we have to handle
the FPU does not always check whether the ARM_FEATURE_M_SECURITY bit
is set before testing whether env->v7m.nsacr permits access to the
FPU. This means that for a CPU with an FPU but without the Security
Extension we would always take a bogus fault when trying to stack
the FPU registers on an exception entry.

We could fix this by adding extra feature bit checks for all uses,
but it is simpler to just make the internal value of nsacr 0xcff
("all non-secure accesses allowed"), since this is not guest
visible when the Security Extension is not present. This allows
us to continue to follow the Arm ARM pseudocode which takes a
similar approach. (In particular, in the v8.1 Arm ARM the register
is documented as reading as 0xcff in this configuration.)

Fixes: https://bugs.launchpad.net/qemu/+bug/1838475

Backports commit 02ac2f7f613b47f6a5b397b20ab0e6b2e7fb89fa from qemu
2019-08-08 19:56:56 -04:00
..
accel Revert "cputlb: Filter flushes on already clean tlbs" 2019-06-30 19:21:20 -04:00
crypto crypto: Clean up includes 2018-02-19 00:47:40 -05:00
default-configs target/riscv: Initial introduction of the RISC-V target 2019-03-08 21:46:10 -05:00
docs docs/devel/memory.txt: Document _with_attrs accessors 2018-10-04 04:46:26 -04:00
fpu qemu/fpu: Synchronize with Qemu 2019-03-09 18:27:31 -05:00
hw i386: Update new x86_apicid parsing rules with die_offset support 2019-08-08 18:22:03 -04:00
include include/qemu/atomic.h: Add signal_barrier 2019-08-08 19:26:41 -04:00
qapi qapi: Rewrite string-input-visitor's integer and list parsing 2018-12-18 04:57:25 -05:00
qobject qstring: Move qstring_from_substr()'s @end one to the right 2018-08-02 21:24:19 -04:00
qom cpu: Move icount_decr to CPUNegativeOffsetState 2019-06-13 15:34:28 -04:00
scripts decodetree: Fix comparison of Field 2019-06-13 16:17:56 -04:00
target target/arm: Avoid bogus NSACR traps on M-profile without Security Extension 2019-08-08 19:56:56 -04:00
tcg tcg/aarch64: Fix output of extract2 opcodes 2019-08-08 19:25:37 -04:00
util util/cacheinfo: Use uint64_t on LLP64 model to satisfy Windows ARM64 2019-05-09 17:43:27 -04:00
aarch64.h target/arm: Declare some M-profile functions publicly 2019-08-08 15:37:01 -04:00
aarch64eb.h target/arm: Declare some M-profile functions publicly 2019-08-08 15:37:01 -04:00
accel.c clean-up: removed duplicate #includes 2018-02-28 08:51:56 -05:00
arm.h target/arm: Declare some M-profile functions publicly 2019-08-08 15:37:01 -04:00
armeb.h target/arm: Declare some M-profile functions publicly 2019-08-08 15:37:01 -04:00
CODING_STYLE
configure Deprecate Python 2 support 2019-08-08 17:16:26 -04:00
COPYING
COPYING.LIB
cpus.c Include qapi/error.h exactly where needed 2018-03-07 12:26:38 -05:00
exec.c exec.c: refactor function flatview_add_to_dispatch() 2019-03-11 17:00:46 -04:00
gen_all_header.sh
glib_compat.c target/arm/translate: Synchronize with Qemu 2019-04-27 10:13:01 -04:00
HACKING HACKING: document preference for g_new instead of g_malloc 2018-05-22 00:30:50 -04:00
header_gen.py target/riscv: Implement riscv_cpu_unassigned_access 2019-08-08 16:48:02 -04:00
ioport.c hw: remove pio_addr_t 2018-02-24 02:43:16 -05:00
LICENSE
m68k.h tcg: Add support for vector compare select 2019-05-24 18:21:13 -04:00
Makefile Makefile: Rename targets for make recursion 2019-08-08 17:26:49 -04:00
Makefile.objs qapi: Move qapi-schema.json to qapi/, rename generated files 2018-03-09 11:35:11 -05:00
Makefile.target configure: Remove old -fno-gcse workaround for GCC 4.6.x and 4.7.[012] 2018-12-18 03:52:36 -05:00
memory.c memory: unref the memory region in simplify flatview 2019-08-08 19:39:34 -04:00
memory_ldst.inc.c exec: Fix MAP_RAM for cached access 2018-07-03 01:11:12 -04:00
memory_mapping.c include/qemu/osdep.h: Don't include qapi/error.h 2018-02-21 23:08:18 -05:00
mips.h target/mips: Refactor and fix INSERT.<B|H|W|D> instructions 2019-05-28 19:42:28 -04:00
mips64.h target/mips: Refactor and fix INSERT.<B|H|W|D> instructions 2019-05-28 19:42:28 -04:00
mips64el.h target/mips: Refactor and fix INSERT.<B|H|W|D> instructions 2019-05-28 19:42:28 -04:00
mipsel.h target/mips: Refactor and fix INSERT.<B|H|W|D> instructions 2019-05-28 19:42:28 -04:00
powerpc.h tcg: Add support for vector compare select 2019-05-24 18:21:13 -04:00
qemu-timer.c timer/cpus: fix some typos and update some comments 2018-02-25 23:21:57 -05:00
riscv32.h target/riscv: Implement riscv_cpu_unassigned_access 2019-08-08 16:48:02 -04:00
riscv64.h target/riscv: Implement riscv_cpu_unassigned_access 2019-08-08 16:48:02 -04:00
rules.mak build-sys: silence make by default or V=0 2018-03-06 08:58:03 -05:00
sparc.h tcg: Add support for vector compare select 2019-05-24 18:21:13 -04:00
sparc64.h tcg: Add support for vector compare select 2019-05-24 18:21:13 -04:00
unicorn_common.h unicorn_common: Fix unicorn memory functions failing 2018-09-03 10:40:14 -04:00
VERSION Update version for v4.1.0-rc3 release 2019-08-08 19:56:12 -04:00
vl.c Use cpu_create(type) instead of cpu_init(cpu_model) 2018-03-20 14:20:30 -04:00
vl.h
x86_64.h tcg: Add support for vector compare select 2019-05-24 18:21:13 -04:00