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317 commits

Author SHA1 Message Date
Richard Henderson 78378289e3
tcg: Move emit of INDEX_op_end into gen_tb_end 
Backports commit 0a7df5da986bd7ee0789f2d7b8611f2e8eee5046 from qemu
 2018-02-09 08:51:01 -05:00
Richard Henderson 6b4b493dae
tcg: Change tcg_global_mem_new_* to take a TCGv_ptr 
Thus, use cpu_env as the parameter, not TCG_AREG0 directly.
Update all uses in the translators.

Backports commit e1ccc05444676b92c63708096e36582be27fbee1 from qemu
 2018-02-08 12:33:33 -05:00
Richard Henderson afb67fc002
target/arm: Fix aa64 ldp register writeback 
Backports commit 3e4d91b94ce400326fae0850578d9e9f30a71adb from qemu
 2018-02-08 08:29:51 -05:00
Eric Blake 37cdcbf771
maint: Fix macros with broken 'do/while(0); ' usage 2018-02-07 20:27:37 -05:00
Lioncash 0f453b0595
target/arm: Add aa{32, 64}_vfp_{dreg, qreg} helpers 
Backports commit 9a2b5256ea1f68c89d5da4b54f180f576c2c82d6 from qemu
 2018-02-07 10:09:26 -05:00
Lioncash dd577f5ea5
target/arm: Change the type of vfp.regs 
Backports commit 3f68b8a5a6862f856524bb347bf348ae364dd43c from qemu
 2018-02-07 09:57:43 -05:00
Lioncash ef07c136b6
target/arm: Add fp16 support to vfp_expand_imm 
Backports commit 8081796a75414f9ed5ec3d97158e543ed45908ec from qemu.
 2018-02-07 09:47:04 -05:00
Lioncash b55f35ba92
target/arm: Split out vfp_expand_imm 
Backports commit e90a99fe6bde9b85bff8c052ade51520f20d9bce from qemu.
 2018-02-07 09:44:52 -05:00
Lioncash 4c165ed788
translate-a64: Silence unused variable warning 2018-02-06 08:38:01 -05:00
Merry 29d38d7c22
Merge pull request #10 from lioncash/el-busto-ldst-exclusive 
translate-a64: Backport fix for incorrect load/store exclusive unallocated checks
 2018-02-05 20:59:25 +00:00
Merry 82c4212ce3
Merge pull request #8 from lioncash/optimize 
Backport REV16 optimizations from qemu
 2018-02-05 20:58:58 +00:00
Lioncash 1e451b386a
translate-a64: Backport fix for incorrect load/store exclusive unallocated checks 
Backports commit e14f0eb12f920fd96b9f79d15cedd437648e8667 from qemu
 2018-02-04 23:17:45 -05:00
Lioncash 5a37b8c28e
Backport optimizations to AArch32's REV16 handling 
Backports commit 68cedf733ae32363ccf54f0b52c8a424d5ec98ed from qemu
 2018-02-04 14:53:28 -05:00
Lioncash 4a8a92bad2
Backport optimizations to AArch64's REV16 handling 
Backports commits abb1066df313602ef0ca631126bd342d399d5359 and e4256c3cbf7eefebc0bc6e1f472c47c6dd20b996 from qemu.
 2018-02-04 14:45:39 -05:00
Lioncash 122d54e23e
Backport the SVE feature flag 
Backports commit 0d0a16c647650d476219a5e1313dec434f9fbebb in qemu to unicorn
 2018-02-02 08:52:15 -05:00
Lioncash 4fb2fbfacf
Backport the JAZELLE feature flag 
Backports commit c99a55d38dd5b5131f3fcbbaf41828a09ee62544 in qemu to unicorn
 2018-02-02 08:50:18 -05:00
Lioncash 84319130cd
Backport the M_SECURITY feature flag 
Backports relevant parts from commit 1e577cc7cffd3de14dbd321de5c3ef191c6ab07f in qemu to unicorn
 2018-02-02 08:44:46 -05:00
Lioncash 20038fb801
Backport the PMU feature flag 
Backports the applicable code from commit 929e754d5a621cd53f30e69b766ccf381b58d124 to unicorn
 2018-02-02 08:28:27 -05:00
Lioncash 35100ce4e0
Backport the VBAR feature flag 
Backports commit 91db4642f868cf2e591b62d31a19d35b02ea791e from qemu to unicorn
 2018-02-02 08:24:12 -05:00
Lioncash 291b5753eb
Backport the THUMB_DSP feature flag 
Backports commit 62b44f059a84d1ac580a653fc4110dfabaef6b83 in qemu to unicorn.
 2018-02-02 07:59:26 -05:00
Lioncash 438e2836e0
helper_a64: Fix CRC32's implementation 2018-01-29 09:24:36 -05:00
Lioncash d41b200fd4
A64: Add EOR3 and BCAX support 
Backported to unicorn from: https://lists.nongnu.org/archive/html/qemu-devel/2018-01/msg05003.html
 2018-01-25 21:18:36 -05:00
MerryMage 4128f3b259 aarch64: Add FPCR and FPSR registers 2018-01-16 17:37:47 +00:00
MerryMage f90c819a33 aarch64: Add pstate pseudoregister 2018-01-16 17:37:17 +00:00
bunnei 73f4573535 aarch64: Add exception syndrome pseudo register. 2018-01-03 19:41:12 -05:00
Nguyen Anh Quynh d5f83a9c2e arm: cleanup for ARM_CPU 2017-12-21 09:43:33 +08:00
Nguyen Anh Quynh e67be36c88 arm: remove unused variable in arm_cpu_get_phys_page_debug() 2017-12-20 22:12:35 +08:00
misson20000 014ccfb94a Aarch64 add thread registers (#834) 
* add thread registers to AArch64

* update bindings to add AArch64 thread registers

* fix indentation for register read/write switch-case in unicorn_aarch64.c
 2017-05-14 14:42:49 +07:00
Ryan Hileman ae6ea3b91d fix arm64 hang (fix #827) (#828) 2017-05-09 20:19:32 +08:00
zhangwm 4a62409949 arm64eb: arm64 big endian also using little endian instructions. (#816) 
* arm64eb: arm64 big endian also using little endian instructions.

* arm64: using another example that depends on endians.

example:
1. store a word: 0x12345678
2. load a byte:
   * little endian : 0x78
   * big endian    : 0x12
 2017-05-04 20:00:48 +08:00
Ryan Hileman 1b00d3f89a remove slow cpu QOM casts (#815) 2017-05-02 14:56:39 +08:00
Ryan Hileman 187b470245 add arm64 CPACR_EL1 register support (#814) 2017-05-02 14:51:19 +08:00
zhangwm 2e973a13f0 arm64eb: add support for ARM64 big endian. 2017-04-24 23:30:01 +08:00
Nguyen Anh Quynh 513075e061 arm: fix an warning reported by GCC 2017-04-21 21:12:57 +08:00
Nguyen Anh Quynh e917c9de10 Merge branch 'master' into msvc2 2017-04-21 01:17:00 +08:00
0xSeb 605400e10e determine correct Thumb/Thumb2 instruction size (16/32-bit) for code … (#796) 
* determine correct Thumb/Thumb2 instruction size (16/32-bit) for code hook

* determine correct Thumb/Thumb2 instruction size (16/32-bit) for code hook

* determine correct Thumb/Thumb2 instruction size (16/32-bit) for code hook
 2017-04-15 00:39:56 +08:00
bunnei 4eca426fb6 unicorn_aarch64: Expose UC_ARM64_REG_NZCV register. (#791) 2017-03-31 10:21:45 +08:00
Nguyen Anh Quynh 094ca80092 fix conflicts 2017-03-30 12:23:24 +08:00
zhangwm ccdb0ff523 armeb: rename arm's and mips's *REGS_STORAGE_SIZE to avoid big-endian and little-endian's duplicated definition. 2017-03-15 22:25:35 +08:00
zhangwm d8fe34a2e8 armeb: Add support for ARM big endian. 2017-03-13 22:32:44 +08:00
Nguyen Anh Quynh c01dcf0a14 fix merge conflicts 2017-03-10 21:04:33 +08:00
feliam 0150ca24b1 Add support for ARM application flags - APSR register (#776) 2017-03-09 22:28:03 +08:00
stevielavern b3a5eae81c uc_reg_read & uc_reg_write now support ARM64 Neon registers (#774) 
* uc_reg_read & uc_reg_write now support ARM64 Neon registers

* Do not reuse uc_x86_xmm for uc_arm64_neon128. TODO: refactor both classes to use the same parent.
 2017-03-07 21:29:34 +08:00
Nguyen Anh Quynh 6ea39f7d5a merge msvc with master 2017-02-24 10:39:36 +08:00
Nguyen Anh Quynh 714cf2c609 arm: fix a warning 2017-02-23 20:32:09 +08:00
Parker Thompson 053ecd7bf4 Added ARM coproc registers (#684) 
* Added ARM coproc registers

* Added regression test for vfp
 2017-01-25 11:56:19 +08:00
xorstream e08d1bf7c6 Arm issue fix. (#738) 
* Fix for MIPS issue.

* Sparc support added.

* M68K support added.

* Arm support ported.

* Fix issue with VS2015 shlobj.h file

* Arm issue fix.
 2017-01-24 17:45:01 +08:00
xorstream 8e45102b43 Arm support ported. (#736) 
* Fix for MIPS issue.

* Sparc support added.

* M68K support added.

* Arm support ported.

* Fix issue with VS2015 shlobj.h file
 2017-01-23 23:30:57 +08:00
Nguyen Anh Quynh 206819bd98 cleanup after msvc port 2017-01-22 21:27:17 +08:00
xorstream 770c5616e2 Automated leading tab to spaces conversion. 2017-01-21 12:28:22 +11:00
xorstream 429bfca48e Fixes for MSVC native support to still work with GCC/GNU. 2017-01-21 01:07:10 +11:00
xorstream fac6a66860 platform.h move #3 2017-01-21 00:13:21 +11:00
xorstream 92392e0f57 Merge with current master. 2017-01-20 18:22:28 +11:00
Nguyen Anh Quynh b678512fc1 remove kvm stuffs 2017-01-20 01:03:59 +08:00
xorstream 1aeaf5c40d This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
Nguyen Anh Quynh 287e047fdb delete sparc32_dma.h & arm-semi.c 2017-01-19 15:10:41 +08:00
Elton G 47150b6df3 reg_read and reg_write now work with registers W0 through W30 in Aarch64 (#716) 
* reg_read and reg_write now work with registers W0 through W30 in Aarch64 emulaton

* Added a regress test for the ARM64 reg_read and reg_write on 32-bit registers (W0-W30)
Added a new macro in uc_priv.h (WRITE_DWORD_TO_QWORD), in order to write to the lower 32 bits of a 64 bit value without overwriting the whole value when using reg_write

* Fixed WRITE_DWORD macro

reg_write would zero out the high order bits when writing to 32 bit registers

e.g. uc.reg_write(UC_X86_REG_EAX, 0) would also set register RAX to zero
 2017-01-15 20:13:35 +08:00
Agustin Gianni a63a34bfbc Allow the client to write to CPSR 2017-01-05 00:00:15 +01:00
Chris Eagle fccbcfd4c2 revert to use of g_free to make future qemu integrations easier (#695) 
* revert to use of g_free to make future qemu integrations easier

* bracing
 2016-12-21 22:28:36 +08:00
Chris Eagle f8f9e993a8 merge upstream/noglib and update some glib related types 2016-12-19 12:32:06 -08:00
Chris Eagle e07e57a862 battling git 2016-12-19 12:10:02 -08:00
Chris Eagle 71bda8e012 stick to gint/guint rather than int32_t/uint32_t 2016-12-19 09:43:35 -08:00
Nguyen Anh Quynh bd1632e60c fix an warning 'control may reach end of non-void function' 2016-12-20 00:21:02 +08:00
Chris Eagle e46545f722 remove glib dependency by provide compatible replacements 2016-12-18 14:56:58 -08:00
Nguyen Anh Quynh b7cdbe7a88 Merge branch 'feat/reg_save_restore' of https://github.com/rhelmot/unicorn into rhelmot-feat/reg_save_restore 2016-10-07 09:57:07 +08:00
Nguyen Anh Quynh 7d15a60b25 arm64: disable deadcode introduced by PR #643 2016-09-29 12:34:44 +08:00
Nguyen Anh Quynh 507d557aa5 arm: disable deadcode introduced by PR #643 2016-09-29 12:33:16 +08:00
Ryan Hileman cb615fdba7 remove uc->cpus 2016-09-23 07:38:21 -07:00
Andrew Dutcher 0ef2b5fd71 New feature: registers can be bulk saved/restored in an opaque blob 2016-08-20 04:14:07 -07:00
Andrew Dutcher 97b10da133 Undo the disaster that was the patch to unicorn github issue #266 and fix it correctly. makes normal self-modifying code work. 2016-08-09 19:35:20 -07:00
Nguyen Anh Quynh fd39ec465b arm: sync env.uc->thumb with env.thumb in arm_reg_write() 2016-07-30 13:21:44 +08:00
Eloi Sanfelix 3a1c13fda9 Set thumb mode based on PC value in ARM. Mask off last bit of PC. 2016-06-17 13:46:34 +02:00
Nguyen Anh Quynh 40ac55cf74 Merge branch 'drop-zlib' of https://github.com/radare/unicorn into radare-drop-zlib 2016-06-15 16:41:13 +07:00
pancake fe96e8325b Remove unused zlib dependency 2016-06-15 09:24:16 +02:00
mkravchik 4b45869437 Reading and writing NEON registers 2016-05-04 11:23:32 +03:00
Nguyen Anh Quynh 8932463f9d arm: qutie emulation on EXCP_YIELD exception. this fixes testcase 004-segmentation_fault_1 in #520 2016-04-20 12:04:15 +08:00
Nguyen Anh Quynh cc6cbc5cf7 Merge branch 'memleak' into m2 2016-04-18 12:48:13 +08:00
Ryan Hileman acd88856e1 add batched reg access 2016-04-04 20:51:38 -07:00
Nguyen Anh Quynh fb1ebac000 Merge branch 'master' into m1 2016-03-09 15:13:42 +08:00
Hiroyuki UEKAWA c5888e5670 move macros in qemu/target-*/unicorn*.c to uc_priv.h 2016-03-02 12:43:02 +09:00
Hiroyuki UEKAWA 1cd3c3093b fix WRITE_BYTE_H 2016-03-02 10:51:50 +09:00
Nguyen Anh Quynh b69feb8d0b Merge branch 'master' into memleak2 2016-02-15 15:52:10 +08:00
Nguyen Anh Quynh e73cbf1c88 arm: UC_QUERY_MODE return hardware mode (see issue #397) 2016-02-06 09:47:57 +08:00
Nguyen Anh Quynh 20b01a6933 fix merge conflict 2016-02-01 12:08:38 +08:00
danghvu 36e53ad8a1 Fix arm & arm64 memleaks 2016-01-31 16:22:20 -06:00
Nguyen Anh Quynh c8569d8128 arm: fix change PC feature. now tests/regress/callback-pc.py passes 2016-01-28 16:03:19 +08:00
Nguyen Anh Quynh 5a04bcb115 allow to change PC during callback. this solves issue #210 2016-01-28 14:06:17 +08:00
Nguyen Anh Quynh 48ab148d1c Merge branch 'hook' 2016-01-26 22:52:29 +08:00
Nguyen Anh Quynh 2341f5dd1a code style 2016-01-26 17:37:48 +08:00
Nguyen Anh Quynh 6f3d48077e rename UC_QUERY_ARM_MODE to a more generic name UC_QUERY_MODE. make all bindings support this new constant 2016-01-24 01:08:23 +08:00
Nguyen Anh Quynh 4dbad9aa9b add new API uc_query() to query internal status of emulator at runtime 2016-01-23 17:14:44 +08:00
Nguyen Anh Quynh 38d1443504 Merge branch 'hook-refactor' of https://github.com/lunixbochs/unicorn into lunixbochs-hook-refactor 2016-01-23 13:24:12 +08:00
Ryan Hileman 2ac1281f82 rework code/block tracing 2016-01-22 19:07:50 -08:00
Nguyen Anh Quynh 249e2ac0a0 Merge branch 'hook-refactor' of https://github.com/lunixbochs/unicorn into lunixbochs-hook-refactor 2016-01-23 10:58:37 +08:00
Ryan Hileman 0886ae8ede rework code/block tracing 2016-01-22 18:42:27 -08:00
Ryan Hileman 93052f6566 refactor to allow multiple hooks for one type 2016-01-22 18:41:43 -08:00
xorstream b4b83ff207 moar fixes 2016-01-23 12:56:47 +11:00
xorstream d8aaa2f44c Fixes to runtime arm mask checks 2016-01-23 12:44:12 +11:00
xorstream 678d645b80 Fix uc_mode usage in source code 2016-01-23 12:29:22 +11:00
xorstream 8763d426c2 Fix uc_mode usage in source code 2016-01-23 12:08:49 +11:00
Nguyen Anh Quynh b72671c6d5 sparc, arm, m68k: check for exit request after every hooked instruction 2015-12-20 12:28:15 +08:00
Nguyen Anh Quynh 2f297bdd3a handle some errors properly so avoid exit() during initialization. this fixes issue #237 2015-11-12 01:43:41 +08:00
Nguyen Anh Quynh 142d3a6f72 arm: allow to read CPSR register 2015-10-17 15:59:27 +08:00
Nguyen Anh Quynh 3ca8774f1a arm: properly handle the case when first insn in block is until address 2015-09-30 14:42:08 +08:00
Nguyen Anh Quynh 886946dcf4 do not use syscall to quit emulation. this can fix issues #147 & #148 2015-09-26 16:49:00 +08:00
Nguyen Anh Quynh d7d4be25b1 arm64: early check to see if the address of this block is the until address 2015-09-21 10:26:33 +08:00
Nguyen Anh Quynh 5005b4a6e2 arm: early check to see if the address of this block is the until address 2015-09-17 09:16:57 +07:00
Nguyen Anh Quynh c1dd9fbfdf arm64: handle SP register. this fixes issue #122 2015-09-08 08:40:42 +08:00
Nguyen Anh Quynh 3ac8615cbb arm: handle invalid instruction. this fixes issue #114 2015-09-08 00:43:09 +08:00
Nguyen Anh Quynh 84e3b5c897 cast all the values to write to registers in uc_reg_write() to unsigned type. this fixes issue #98 2015-09-04 11:17:08 +08:00
Jonathon Reinhart 3bd705a060 Merge remote-tracking branch 'upstream/master' into change-handle-based-api 2015-08-30 00:23:51 -04:00
Nguyen Anh Quynh b335cf016c do not generate basic-block callback when translation is broken in the middle due to full cache (all the remaining archs) 2015-08-27 21:09:00 +08:00
Jonathon Reinhart 622d5cd5f9 change uch to uc_struct (target-arm) 2015-08-26 09:02:16 -04:00
Jonathon Reinhart 9163bba812 restore mode of .[ch] files 
These were marked as executable in 5c3b6819, likely due to a Windows
filesystem being involved. This can be avoided:
http://stackoverflow.com/q/1580596/119527
 2015-08-24 21:19:12 -04:00
Chris Eagle 5c3b681945 Add const to uc_reg_write and derivitives 2015-08-24 09:42:50 -07:00
mothran a167f7c456 renames the register constants so unicorn and capstone can compile together 2015-08-23 21:36:33 -07:00
Nguyen Anh Quynh 344d016104 import 2015-08-21 15:04:50 +08:00