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unicorn/qemu/target/arm
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Richard Henderson 2a4a7b9391
tcg: Use tlb_fill probe from tlb_vaddr_to_host 
Most of the existing users would continue around a loop which
would fault the tlb entry in via a normal load/store.

But for AArch64 SVE we have an existing emulation bug wherein we
would mark the first element of a no-fault vector load as faulted
(within the FFR, not via exception) just because we did not have
its address in the TLB. Now we can properly only mark it as faulted
if there really is no valid, readable translation, while still not
raising an exception. (Note that beyond the first element of the
vector, the hardware may report a fault for any reason whatsoever;
with at least one element loaded, forward progress is guaranteed.)

Backports commit 4811e9095c0491bc6f5450e5012c9c4796b9e59d from qemu
2019-05-16 18:27:03 -04:00
..
arm-powerctl.c arm: Clarify the logic of set_pc() 2019-02-03 17:55:30 -05:00
arm-powerctl.h ARM: Factor out ARM on/off PSCI control functions 2018-03-01 23:31:47 -05:00
arm_ldst.h Fix Thumb-1 BE32 execution and disassembly. 2018-03-02 00:20:11 -05:00
cpu-qom.h target/arm: Add "-cpu max" support 2018-03-12 10:11:49 -04:00
cpu.c target/arm: Convert to CPUClass::tlb_fill 2019-05-16 16:55:12 -04:00
cpu.h target/arm: Implement XPSR GE bits 2019-05-09 17:46:31 -04:00
cpu64.c target/arm/translate: Synchronize with Qemu 2019-04-27 10:13:01 -04:00
crypto_helper.c target/arm/cpu and crypto_helper: Correct bad merge and adjust to qemu code style 2018-03-12 11:57:24 -04:00
helper-a64.c target/arm: check CF_PARALLEL instead of parallel_cpus 2019-05-04 22:44:32 -04:00
helper-a64.h target/arm: check CF_PARALLEL instead of parallel_cpus 2019-05-04 22:44:32 -04:00
helper-sve.h target/arm: Rewrite vector gather first-fault loads 2018-10-08 14:15:15 -04:00
helper.c tcg: Use CPUClass::tlb_fill in cputlb.c 2019-05-16 17:35:37 -04:00
helper.h target/arm: Use tcg_gen_abs_i64 and tcg_gen_gvec_abs 2019-05-16 16:43:02 -04:00
internals.h target/arm: Convert to CPUClass::tlb_fill 2019-05-16 16:55:12 -04:00
iwmmxt_helper.c target/arm: Untabify iwmmxt_helper.c 2018-08-25 04:33:44 -04:00
kvm-consts.h arm: better stub version for MISMATCH_CHECK 2018-03-02 00:13:45 -05:00
Makefile.objs target/arm: Split out vfp_helper.c 2019-02-22 18:48:44 -05:00
neon_helper.c target/arm: Use tcg_gen_abs_i64 and tcg_gen_gvec_abs 2019-05-16 16:43:02 -04:00
op_addsub.h Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
op_helper.c target/arm: Convert to CPUClass::tlb_fill 2019-05-16 16:55:12 -04:00
pauth_helper.c target/arm: Implement pauth_computepac 2019-01-22 16:35:07 -05:00
psci.c fix WFI/WFE length in syndrome register 2018-03-05 11:21:51 -05:00
sve.decode target/arm: Sychronize with qemu 2019-04-18 04:49:11 -04:00
sve_helper.c tcg: Use tlb_fill probe from tlb_vaddr_to_host 2019-05-16 18:27:03 -04:00
translate-a64.c target/arm: Use tcg_gen_abs_i64 and tcg_gen_gvec_abs 2019-05-16 16:43:02 -04:00
translate-a64.h arm: Take DisasContext as a parameter instead of TCGContext where applicable 2018-10-06 04:17:12 -04:00
translate-sve.c tcg: Specify optional vector requirements with a list 2019-05-16 15:05:02 -04:00
translate.c target/arm: Use tcg_gen_abs_i64 and tcg_gen_gvec_abs 2019-05-16 16:43:02 -04:00
translate.h target/arm: Implement M-profile lazy FP state preservation 2019-04-30 11:21:50 -04:00
unicorn.h Move target-* CPU file into a target/ folder 2018-03-01 22:50:58 -05:00
unicorn_aarch64.c unicorn_aarch64: Use aa64_vfp_qreg instead of aa32_vfp_dreg 2018-09-03 07:47:40 +01:00
unicorn_arm.c unicorn_arm: Treat registers as unsigned values in casts 2019-04-26 08:48:31 -04:00
vec_helper.c target/arm: Add helpers for FMLAL 2019-02-28 15:31:48 -05:00
vfp_helper.c target/arm: Make sure M-profile FPSCR RES0 bits are not settable 2019-04-30 10:12:17 -04:00