Commit graph

102 commits

Author SHA1 Message Date
Thomas Huth b2f1326437
Move target-* CPU file into a target/ folder
We've currently got 18 architectures in QEMU, and thus 18 target-xxx
folders in the root folder of the QEMU source tree. More architectures
(e.g. RISC-V, AVR) are likely to be included soon, too, so the main
folder of the QEMU sources slowly gets quite overcrowded with the
target-xxx folders.
To disburden the main folder a little bit, let's move the target-xxx
folders into a dedicated target/ folder, so that target-xxx/ simply
becomes target/xxx/ instead.

Backports commit fcf5ef2ab52c621a4617ebbef36bf43b4003f4c0 from qemu
2018-03-01 22:50:58 -05:00
Laurent Vivier 770989f36f
target-m68k: increment/decrement with SP
On 680x0 family only.

Address Register indirect With postincrement:

When using the stack pointer (A7) with byte size data, the register
is incremented by two.

Address Register indirect With predecrement:

When using the stack pointer (A7) with byte size data, the register
is decremented by two.

Backports commit 727d937b59f1f722f983e20f9cd23b0e7ef60165 from qemu
2018-03-01 19:16:22 -05:00
Laurent Vivier 6ff83aadab
target-m68k: CAS doesn't need aligned access
Backports commit b19578f42872aefef891e5804359af8d935a5487 from qemu
2018-03-01 19:15:20 -05:00
Laurent Vivier 636bf36272
target-m68k: manage pre-dec et post-inc in CAS
In these cases we must update the address register after
the operation.

Backports commit 308feb935249ad745ef763707e1db69bc10ba789 from qemu
2018-03-01 19:14:35 -05:00
Laurent Vivier 1197d778cc
target-m68k: fix gen_flush_flags()
gen_flush_flags() is setting unconditionally cc_op_synced to 1
and s->cc_op to CC_OP_FLAGS, whereas env->cc_op can be set
to something else by a previous tcg fragment.

We fix that by not setting cc_op_synced to 1
(except for gen_helper_flush_flags() that updates env->cc_op)

FIX: https://github.com/vivier/qemu-m68k/issues/19

Backports commit 695576db2daaf2bdc63e7f6d36038b61caed622a from qemu
2018-03-01 19:13:35 -05:00
Laurent Vivier b3c3cf84a5
target-m68k: fix bit operation with immediate value
M680x0 bit operations with an immediate value use 9 bits of the 16bit
value, while coldfire ones use only 8 bits.

Backports commit fe53c2be8c12da345bd788b949e0b2360e4b3db3 from qemu
2018-03-01 19:12:20 -05:00
Richard Henderson 6f5081314b
target-m68k: Implement bfffo
Backports commit a45f1763cc501861ea4f5eed06e6f58aa681a082 from qemu
2018-03-01 19:10:59 -05:00
Richard Henderson 797e5d44e9
target-m68k: Implement bitfield ops for memory
Backports commit f2224f2c9a9ed63edaed77ae21ffb1e501d7f247 from qemu
2018-03-01 19:07:06 -05:00
Richard Henderson 4f481b2c5a
target-m68k: Implement bitfield ops for registers
Backports commit ac815f46a325b5dabe2ebd6561e4244767c0a603 from qemu
2018-03-01 18:58:47 -05:00
Laurent Vivier 5d4a5e9ba7
target-m68k: free TCG variables that are not
This is a cleanup patch. It adds call to tcg_temp_free()
when it is missing.

Backports commit 2b5e2170678af36df48ab4b05dff81fe40b41a65 from qemu
2018-03-01 12:27:43 -05:00
Laurent Vivier 74beed5a4d
target-m68k: add rol/ror/roxl/roxr instructions
Backports commit 0194cf31cfc84516d10eca354146673150e10410 from qemu
2018-03-01 12:21:02 -05:00
Richard Henderson cf9424d60d
target-m68k: Inline shifts
Also manage word and byte operands and fix the computation of
overflow in the case of M68000 arithmetic shifts.

Backports commit 367790cce8e14131426f5190dfd7d1bdbf656e4d from qemu
2018-03-01 12:11:10 -05:00
Richard Henderson 0c00b036be
target-m68k: Do not cpu_abort on undefined insns
Report this properly via exception and, importantly, allow
the disassembler the chance to tell us what insn is not handled.

Backports commit 72d2e4b6a437f11f97d3138f6b2ec177b78210c7 from qemu
2018-03-01 12:02:39 -05:00
Laurent Vivier 90b0b6d867
target-m68k: Implement 680x0 movem
680x0 movem can load/store words and long words and can use more
addressing modes. Coldfire can only use long words with (Ax) and
(d16,Ax) addressing modes.

Backports commit 7b542eb96d7d5d9266a9c0425f05d49c8e6df2f9 from qemu
2018-03-01 12:01:46 -05:00
Laurent Vivier 2d318da080
target-m68k: add cas/cas2 ops
Implement CAS using cmpxchg.
Implement CAS2 using helper and either cmpxchg when
the 32bit addresses are consecutive, or with
parallel_cpus+cpu_loop_exit_atomic() otherwise.

Backports commit 14f944063affbcc7bd6df42b060793dbfee8a822 from qemu
2018-03-01 11:56:26 -05:00
Laurent Vivier f602f9d40c
target-m68k: add abcd/sbcd/nbcd
Backports commit fb5543d820018a46b713911e7653594be727ca98 from qemu
2018-03-01 11:51:49 -05:00
Laurent Vivier 90b87b3580
target-m68k: add 680x0 divu/divs variants
Update helper to set the throwing location in case of div-by-0.
Cleanup divX.w and add quad word variants of divX.l.

Backports commit 0ccb9c1d8128a020720d5c6abf99a470742a1b94 from qemu
2018-03-01 11:42:30 -05:00
Laurent Vivier f3990e8f87
target-m68k: add 64bit mull
Backports commit 8be95defd6ab10d2c9f986879a0afa82417cb8e5 from qemu
2018-03-01 11:32:59 -05:00
Laurent Vivier e1c7d37556
target-m68k: add cmpm
Backports commit 817af1c72d227fd5759ef882bef61acee40679b1 from qemu
2018-03-01 11:29:35 -05:00
Richard Henderson e6ca471dda
target-m68k: Split gen_lea and gen_ea
Provide gen_lea_mode and gen_ea_mode, where the mode can be
specified manually, rather than taken from the instruction.

Backports commit f84aab269ddab8509b77408b886e9071bf5c48fb from qemu
2018-03-01 11:27:43 -05:00
Richard Henderson 5541553e8d
target-m68k: Delay autoinc writeback
Backports commit 8a1e52b69d2cd1c633f3c473a213d575931bf46d from qemu
2018-03-01 11:18:36 -05:00
Laurent Vivier 7055c38183
target-m68k: fix muluw/mulsw
"The multiplier and multiplicand are both word operands, and the result
is a long-word operand."

So compute flags on a long-word result, not on a word result.

Backports commit 4a18cd44f3c905d443c26e26bb9b09932606d1a3 from qemu
2018-03-01 08:59:42 -05:00
Laurent Vivier 527c68f40e
target-m68k: Fix cmpa operand size
"The size of the operation can be specified as word or long.
Word length source operands are sign-extended to 32 bits for
comparison."

So comparison is always done using OS_LONG.

Backports commit 5436c29d78957a6825a93f0eb79dfab388641017 from qemu
2018-03-01 08:58:59 -05:00
Laurent Vivier 69687e1824
target-m68k: fix EXG instruction
opcodes of "EXG Ax,Ay" and "EXG Dx,Dy" have been swapped

Backports commit c090c97d925ce751d8834d5c5a404952598f67c0 from qemu
2018-03-01 08:57:45 -05:00
Laurent Vivier 5daf91ea48
target-m68k: immediate ops manage word and byte operands
Backports commit 92c62548f69cb4ba739d7d046e9caf9ea75753e4 from qemu
2018-02-28 08:42:22 -05:00
Laurent Vivier f7c29f73b3
target-m68k: cmp manages word and bytes operands
Backports commit ff99b952c8280853801fe14f7ae62d0f87464f7d from qemu
2018-02-28 08:37:46 -05:00
Laurent Vivier fc28e8127f
target-m68k: add/sub manage word and byte operands
Backports commit 8a370c6cb770b618f7eb66628116c25e84588df8 from qemu
2018-02-28 07:18:25 -05:00
Laurent Vivier bc27695926
target-m68k: add addressing modes to neg
Backports commit 227de713e0f4224a82c32991b4e4c4973381426b from qemu
2018-02-28 07:07:28 -05:00
Laurent Vivier 3558b93f11
target-m68k: introduce byte and word cc_ops
Backports commit db3d7945ae7992c91cc5705dccf60fec79b24dc4 from qemu
2018-02-28 06:52:16 -05:00
Laurent Vivier 4e257ffda9
target-m68k: some bit ops cleanup
Backports commit 3c980d2ef664e6d5a1a0c98aca4d11d33b17ca59 from qemu
2018-02-28 01:25:58 -05:00
Laurent Vivier cfab571859
target-m68k: suba/adda can manage word operand
Backports commit 415f4b62eb4629bd3702e6fb8aa51437a92983ff from qemu
2018-02-28 01:20:23 -05:00
Laurent Vivier 99c297efe3
target-m68k: and can manage word and byte operands
Backports commit 52dc23c5956159a79a4e2d4193e44d2c4cf3883c from qemu
2018-02-28 01:19:02 -05:00
Laurent Vivier 41372b0cc9
target-m68k: or can manage word and byte operands
Backports commit 020a4659208a6f9a985881504fd4d3b44ab589be from qemu
2018-02-28 01:15:27 -05:00
Laurent Vivier e140aac281
target-m68k: eor can manage word and byte operands
Backports commit eec37aec85af9f5fd59b534d20c86a775b8e7973 from qemu
2018-02-28 01:05:21 -05:00
Laurent Vivier bc52777b00
target-m68k: add addressing modes to not
Backports commit ea4f2a844132c81f1e6b51fed7019686ce4e3bc5 from qemu
2018-02-28 01:03:38 -05:00
Richard Henderson 549e31cc72
target-m68k: Inline addx, subx, negx
And add opcodes for 680x0

Backports commit a665a820e5d46b1611f409fbc7a540fe1c6bf5c8 from qemu
2018-02-28 01:02:31 -05:00
Laurent Vivier b796f934ff
target-m68k: add dbcc
Backports commit beff27ab3a60d8abab4a166670ca79b3c0970005 from qemu
2018-02-28 00:45:39 -05:00
Laurent Vivier 977c3fe6c4
target-m68k: add addressing modes to scc
Backports commit d5a3cf33f2f65069d2f79a6e349f0d8140f02bb4 from qemu
2018-02-28 00:43:30 -05:00
Laurent Vivier 77b1754376
target-m68k: add exg ops
Backports commit 29cf437da4eeacb46cd7076014d06c85ca47c91d from qemu
2018-02-28 00:37:41 -05:00
Laurent Vivier 56882899be
target-m68k: add linkl
Backports commit c630e436c0ed3adc3a858c328119daf6d1b3357f from qemu
2018-02-28 00:31:27 -05:00
Laurent Vivier 59d6a1a744
target-m68k: add bkpt instruction
Backports commit 71600eda7cc48f03ea306bc69ed7e52ef1d9dd91 from qemu
2018-02-28 00:29:41 -05:00
Richard Henderson 4168095fed
target-m68k: Optimize gen_flush_flags
Backports commit 36f0399d46f2ccf4f6e7451ba46b1e8d0e9ab341 from qemu
2018-02-27 10:19:54 -05:00
Richard Henderson 7403e63f2f
target-m68k: Optimize some comparisons
Backports commit 9d896621c1820fd8f437fac26fd7d2e0921091c3 from qemu
2018-02-27 10:15:20 -05:00
Richard Henderson 672a28173f
target-m68k: Use setcond for scc
Backports commit b459e3eccfae7fe83e30187c391de00bccf4f51d from qemu
2018-02-27 10:11:35 -05:00
Richard Henderson ed6feb9329
target-m68k: Introduce DisasCompare
Backports commit 6a432295d73df91890dc70c4a94dcc4ba88ad1c3 from qemu
2018-02-27 10:08:32 -05:00
Richard Henderson 4e498cc54d
target-m68k: Reorg flags handling
Separate all ccr bits. Continue to batch updates via cc_op.

Backports commit 620c6cf66584bfbee90db84a7e87a6eabf230ca9 from qemu
2018-02-27 10:02:02 -05:00
Richard Henderson 121309a4d0
target-m68k: Reorg flags handling
Separate all ccr bits. Continue to batch updates via cc_op.

Signed-off-by: Richard Henderson <rth@twiddle.net>

Fix gen_logic_cc() to really extend the size of the result.
Fix gen_get_ccr(): update cc_op as it is used by the helper.
Factorize flags computing and src/ccr cleanup

Backports commit 620c6cf66584bfbee90db84a7e87a6eabf230ca9 from qemu
2018-02-27 09:30:32 -05:00
Laurent Vivier 57ea90a91f
target-m68k: update CPU flags management
Copied from target-i386

Backports commit 9fdb533fb129b19610941bd1e5dd93e7471a18f5 from qemu
2018-02-27 09:15:29 -05:00
Laurent Vivier 125675e334
target-m68k: don't update cc_dest in helpers
Backports commit 91f90d7191f862ab27528dbdf76cee55c77f79cf from qemu
2018-02-27 09:04:51 -05:00
Laurent Vivier 12f9ba3fe4
target-m68k: update move to/from ccr/sr
Backports commit 7c0eb318bdcc3667a861e7b0f140df0b6d9895e2 from qemu
2018-02-27 08:57:05 -05:00