Commit graph

74 commits

Author SHA1 Message Date
Richard Henderson e26a389129
fpu/softfloat: Replace float_class_msnan with parts_silence_nan
With a canonical representation of NaNs, we can silence an SNaN
immediately rather than delay until the final format is known.

Backports commit 0bcfbcbea548656ff930394f296589728c2a0c5d from qemu
2018-05-19 22:28:27 -04:00
Richard Henderson baf1d57071
fpu/softfloat: Replace float_class_dnan with parts_default_nan
With a canonical representation of NaNs, we can return the
default nan directly rather than delay the expansion until
the final format is known.

Note one case where we uselessly assigned to a.sign, which was
overwritten/ignored later when expanding float_class_dnan.

Backports commit f7e598e264b94d0982e647ac303108781d5eb4fa from qemu
2018-05-19 22:25:21 -04:00
Richard Henderson 97152bc427
fpu/softfloat: Introduce parts_is_snan_frac
Backports commit 298b468e4389587ab2e8599dd33eff3fbc698011 from qemu
2018-05-19 22:20:03 -04:00
Richard Henderson f89c1fc034
fpu/softfloat: Canonicalize NaN fraction
Shift the NaN fraction to a canonical position, much like we
do for the fraction of normal numbers. This will facilitate
manipulation of NaNs within the shared code paths.

Backports commit 94933df0e5c34d1a50fc950553f9c9649cae5320 from qemu
2018-05-19 22:17:44 -04:00
Richard Henderson 3873bfe133
fpu/softfloat: Move softfloat-specialize.h below FloatParts definition
We want to be able to specialize on the canonical representation.

Backports commit 0664335a6eb65d684918dd3f1a7f0a3d5b92cbe1 from qemu
2018-05-19 22:07:12 -04:00
Richard Henderson ff8fab55a2
fpu/softfloat: Split floatXX_silence_nan from floatXX_maybe_silence_nan
The new function assumes that the input is an SNaN and
does not double-check.

Backports commit d619bb98fdcda24f9ee3b7a53a4d555228dbca52 from qemu
2018-05-19 22:06:33 -04:00
Richard Henderson db3479e242
fpu/softfloat: Merge NO_SIGNALING_NANS definitions
Move the ifdef inside the relevant functions instead of
duplicating the function declarations.

Backports commit bca52234d1c04e0665f67708bcdef6d805d60adb from qemu
2018-05-19 21:59:24 -04:00
Petr Tesarik d1d09f384e
fpu/softfloat: Fix conversion from uint64 to float128
The significand is passed to normalizeRoundAndPackFloat128() as high
first, low second. The current code passes the integer first, so the
result is incorrectly shifted left by 64 bits.

This bug affects the emulation of s390x instruction CXLGBR (convert
from logical 64-bit binary-integer operand to extended BFP result).

Backports commit 6603d50648901e8b9e6d66ec1142accf0b1df1e6 from qemu
2018-05-19 21:55:59 -04:00
Peter Maydell e7656cbd7a
fpu/softfloat: Don't set Invalid for float-to-int(MAXINT)
In float-to-integer conversion, if the floating point input
converts exactly to the largest or smallest integer that
fits in to the result type, this is not an overflow.
In this situation we were producing the correct result value,
but were incorrectly setting the Invalid flag.
For example for Arm A64, "FCVTAS w0, d0" on an input of
0x41dfffffffc00000 should produce 0x7fffffff and set no flags.

Fix the boundary case to take the right half of the if()
statements.

This fixes a regression from 2.11 introduced by the softfloat
refactoring.

Backports commit 333583757c5e910b040bef793974773635ce1918 from qemu
2018-05-15 21:50:41 -04:00
Alex Bennée 99de568b7d
fpu/softfloat: int_to_float ensure r fully initialised
Reported by Coverity (CID1390635). We ensure this for uint_to_float
later on so we might as well mirror that.

Backports commit a5a5f5e2e437db6c19164b734f838a7bf9e0c5ec from qemu
2018-05-15 21:49:34 -04:00
Peter Maydell 150125de3f
softfloat: Handle default NaN mode after pickNaNMulAdd, not before
It is implementation defined whether a multiply-add of
(0,inf,qnan) or (inf,0,qnan) raises InvalidaOperation or
not, so we let the target-specific pickNaNMulAdd function
handle this. This means that we must do the "return the
default NaN in default NaN mode" check after the call,
not before. Correct the ordering, and restore the comment
from the old propagateFloat64MulAddNaN() that warned about
this corner case.

This fixes a regression from 2.11 for Arm guests where we would
incorrectly fail to set the Invalid flag for these cases.

Backports commit 1839189bbf89889076aadf0c793c1b57977b28d7 from qemu
2018-05-14 07:24:40 -04:00
Richard Henderson 76e343ef55
fpu: Bound increment for scalbn
Without bounding the increment, we can overflow exp either here
in scalbn_decomposed or when adding the bias in round_canonical.
This can result in e.g. underflowing to 0 instead of overflowing
to infinity.

The old softfloat code did bound the increment.

Backports commit ce8d4082054519f2eaac39958edde502860a7fc6 from qemu
2018-04-18 09:21:03 -04:00
Alex Bennée af6a0b7c14
fpu/softfloat: check for Inf / x or 0 / x before /0
The re-factoring of div_floats changed the order of checking meaning
an operation like -inf/0 erroneously raises the divbyzero flag.
IEEE-754 (2008) specifies this should only occur for operations on
finite operands.

We fix this by moving the check on the dividend being Inf/0 to before
the divisor is zero check.

Backports commit 9cb4e398c2f95c1e837fe9c570e124a55259f725 from qemu
2018-04-18 09:19:28 -04:00
Alex Bennée 9517a002da
fpu/softfloat: raise float_invalid for NaN/Inf in round_to_int_and_pack
The re-factor broke the raising of INVALID when NaN/Inf is passed to
the float_to_int conversion functions. round_to_uint_and_pack got this
right for NaN but also missed out the Inf handling.

Fixes https://bugs.launchpad.net/qemu/+bug/1759264

Backports commit 801bc56336a127d9b351b3a2cc0336e4d0cb2686 from qemu
2018-04-16 13:48:17 -04:00
Emilio G. Cota 74b7fe484c
softfloat: fix {min, max}nummag for same-abs-value inputs
Before 8936006 ("fpu/softfloat: re-factor minmax", 2018-02-21),
we used to return +Zero for maxnummag(-Zero,+Zero); after that
commit, we return -Zero.

Fix it by making {min,max}nummag consistent with {min,max}num,
deferring to the latter when the absolute value of the operands
is the same.

With this fix we now pass fp-test.

Backports commit 6245327a367292b354489c54e965646823023919 from qemu
2018-04-16 13:46:29 -04:00
Richard Henderson bc8e85a1c5
fpu: Fix rounding mode for floatN_to_uintM_round_to_zero
We incorrectly passed in the current rounding mode
instead of float_round_to_zero.

Backports commit bd49e6027cbc207c87633c7add3ebd7d3474cd35 from qemu
2018-04-11 19:36:12 -04:00
Lioncash 1c4c5a9403
softfloat-specialize: Perform comparison pass with qemu
Ensures code and formatting are similar
2018-03-21 13:27:59 -04:00
Lioncash ba874ef639
softfloat: Perform comparison pass with qemu
Ensure that the code and formatting are similar.
2018-03-21 13:26:09 -04:00
Stef O'Rear d25e1a6216
softfloat: fix crash on int conversion of SNaN
Backports commit cffad426f520d39c19db64485d8a429fc95b8aca from qemu
2018-03-09 11:40:17 -05:00
Laurent Vivier 5fa3a97549
softfloat: use floatx80_infinity in softfloat
Since f3218a8 ("softfloat: add floatx80 constants")
floatx80_infinity is defined but never used.

This patch updates floatx80 functions to use
this definition.

This allows to define a different default Infinity
value on m68k: the m68k FPU defines infinity with
all bits set to zero in the mantissa.

Backports commit 0f605c889ca3fe9744166ad4149d0dff6dacb696 from qemu
2018-03-09 01:34:45 -05:00
Laurent Vivier b42fcb5496
softfloat: export some functions
Move fpu/softfloat-macros.h to include/fpu/

Export floatx80 functions to be used by target floatx80
specific implementations.

Exports:
propagateFloatx80NaN(), extractFloatx80Frac(),
extractFloatx80Exp(), extractFloatx80Sign(),
normalizeFloatx80Subnormal(), packFloatx80(),
roundAndPackFloatx80(), normalizeRoundAndPackFloatx80()

Also exports packFloat32() that will be used to implement
m68k fsinh, fcos, fsin, ftan operations.

Backports commit 88857aca93f6ec8f372fb9c8201394b0e5582034 from qemu
2018-03-09 01:22:00 -05:00
Alex Bennée 283abedc68
fpu/softfloat: re-factor sqrt
This is a little bit of a departure from softfloat's original approach
as we skip the estimate step in favour of a straight iteration. There
is a minor optimisation to avoid calculating more bits of precision
than we need however this still brings a performance drop, especially
for float64 operations.

Backports commit c13bb2da9eedfbc5886c8048df1bc1114b285fb0 from qemu
2018-03-08 12:23:54 -05:00
Alex Bennée e2fb4b40c3
fpu/softfloat: re-factor compare
The compare function was already expanded from a macro. I keep the
macro expansion but move most of the logic into a compare_decomposed.

Backports commit 0c4c90929143a530730e2879204a55a30bf63758 from qemu
2018-03-08 12:21:20 -05:00
Alex Bennée c38b64f8a9
fpu/softfloat: re-factor minmax
Let's do the same re-factor treatment for minmax functions. I still
use the MACRO trick to expand but now all the checking code is common.

Backports commit 89360067071b1844bf745682e18db7dde74cdb8d from qemu
2018-03-08 12:18:35 -05:00
Alex Bennée 9b296329f6
fpu/softfloat: re-factor scalbn
This is one of the simpler manipulations you could make to a floating
point number.

Backports commit 0bfc9f195209593e91a98cf2233753f56a2e5c02 from qemu
2018-03-08 12:16:19 -05:00
Alex Bennée b389a8c7c4
fpu/softfloat: re-factor int/uint to float
These are considerably simpler as the lower order integers can just
use the higher order conversion function. As the decomposed fractional
part is a full 64 bit rounding and inexact handling comes from the
pack functions.

Backports commit c02e1fb80b553d47420f7492de4bc590c2461a86 from qemu
2018-03-08 12:13:09 -05:00
Alex Bennée acb4b1d5b1
fpu/softfloat: re-factor float to int/uint
We share the common int64/uint64_pack_decomposed function across all
the helpers and simply limit the final result depending on the final
size.

Backports commit ab52f973a504f8de0c5df64631ba4caea70a7d9e from qemu
2018-03-08 12:07:20 -05:00
Alex Bennée b82253adce
fpu/softfloat: re-factor round_to_int
We can now add float16_round_to_int and use the common round_decomposed and
canonicalize functions to have a single implementation for
float16/32/64 round_to_int functions.

Backports commit dbe4d53a590f5689772b683984588b3cf6df163e from qemu
2018-03-08 11:56:59 -05:00
Alex Bennée d92d5c6910
fpu/softfloat: re-factor muladd
We can now add float16_muladd and use the common decompose and
canonicalize functions to have a single implementation for
float16/32/64 muladd functions.

Backports commit d446830a3aac33e7221e361dad3ab1e1892646cb from qemu
2018-03-08 10:55:40 -05:00
Alex Bennée 5ea008e178
fpu/softfloat: re-factor div
We can now add float16_div and use the common decompose and
canonicalize functions to have a single implementation for
float16/32/64 versions.

Backports commit cf07323d494f4bc225e405688c2e455c3423cc40 from qemu
2018-03-08 10:25:07 -05:00
Alex Bennée 2bb86e1efc
fpu/softfloat: re-factor mul
We can now add float16_mul and use the common decompose and
canonicalize functions to have a single implementation for
float16/32/64 versions.

Backports commit 74d707e2cc1e406068acad8e5559cd2584b1073a from qemu
2018-03-08 10:21:15 -05:00
Alex Bennée 58defd9bc0
fpu/softfloat: re-factor add/sub
We can now add float16_add/sub and use the common decompose and
canonicalize functions to have a single implementation for
float16/32/64 add and sub functions.

Backports commit 6fff216769cf7eaa3961c85dee7a72838696d365 from qemu
2018-03-08 10:17:41 -05:00
Alex Bennée b1884d0685
fpu/softfloat: re-factor add/sub
We can now add float16_add/sub and use the common decompose and
canonicalize functions to have a single implementation for
float16/32/64 add and sub functions.

Backports commit 6fff216769cf7eaa3961c85dee7a72838696d365 from qemu
2018-03-08 10:13:14 -05:00
Alex Bennée d80f1ea222
fpu/softfloat: define decompose structures
These structures pave the way for generic softfloat helper routines
that will operate on fully decomposed numbers.

Backports commit a90119b5a2c174250601be6503b91e5c9df6e83b from qemu
2018-03-08 10:06:25 -05:00
Alex Bennée 562f14adcc
fpu/softfloat: move the extract functions to the top of the file
This is pure code-motion during re-factoring as the helpers will be
needed earlier.

Backports commit d97544c94a37371347402bcbee19dd3748d70e48 from qemu
2018-03-08 10:04:54 -05:00
Alex Bennée b5fdc7b411
fpu/softfloat: improve comments on ARM NaN propagation
Mention the pseudo-code fragment from which this is based.

Backports commit 13894527f522caab4ec74334191ef29af975e521 from qemu
2018-03-08 10:03:32 -05:00
Alex Bennée 8110bc8264
fpu/softfloat: implement float16_squash_input_denormal
This will be required when expanding the MINMAX() macro for 16
bit/half-precision operations.

Backports commit 210cbd4910ae9e41e0a1785b96890ea2c291b381 from qemu
2018-03-08 09:44:20 -05:00
Laurent Vivier 4e8e8572c3
softfloat: define floatx80_round()
Add a function to round a floatx80 to the defined precision
(floatx80_rounding_precision)

Backports commit 0f72129281765ed64d26353284059f2bdcde7a23 from qemu
2018-03-03 20:57:27 -05:00
Laurent Vivier 199c62ea01
softfloat: define 680x0 specific values
Backports commit e5b0cbe8e8744b57faf0c62d023525cd466f5ab8 from qemu
2018-03-03 15:01:16 -05:00
Peter Maydell e141ea5dd2
softfloat: Use correct type in float64_to_uint64_round_to_zero()
In float64_to_uint64_round_to_zero() a typo meant that we were
taking the uint64_t return value from float64_to_uint64() and
putting it into an int64_t variable before returning it as
uint64_t again. Use uint64_t instead of pointlessly casting it
back and forth to int64_t.

Backports commit d000b477f2693dbca97cd8ea751c2e0b71890662 from qemu
2018-03-02 10:44:10 -05:00
Bharata B Rao 7fadaf0bc4
softfloat: Add float128_to_uint32_round_to_zero()
float128_to_uint32_round_to_zero() is needed by xscvqpuwz instruction
of PowerPC ISA 3.0.

Backports commit fd425037d25cecaaffdb3831697e0adc10ca2ba3 from qemu
2018-03-02 08:33:09 -05:00
Bharata B Rao 64d32a2237
softfloat: Add float128_to_uint64_round_to_zero()
Implement float128_to_uint64() and use that to implement
float128_to_uint64_round_to_zero()

This is required by xscvqpudz instruction of PowerPC ISA 3.0.

Backports commit 2e6d85683576c970c714c1cc071dca742835b9d4 from qemu
2018-03-02 08:32:02 -05:00
Bharata B Rao 80e522b499
softfloat: Add round-to-odd rounding mode
Power ISA 3.0 introduces a few quadruple precision floating point
instructions that support round-to-odd rounding mode. The
round-to-odd mode is explained as under:

Let Z be the intermediate arithmetic result or the operand of a convert
operation. If Z can be represented exactly in the target format, the
result is Z. Otherwise the result is either Z1 or Z2 whichever is odd.
Here Z1 and Z2 are the next larger and smaller numbers representable
in the target format respectively.

Backports commit 9ee6f678f473007e252934d6acd09c24490d9d42 from qemu
2018-03-02 08:25:00 -05:00
Bharata B Rao 4324d1e97e
softfloat: Fix the default qNAN for target-ppc
Currently float128_default_nan() returns 0xFFFF800000000000 in the
higher double word, but it should return 0x7FFF800000000000 which
is the correct higher double word for default qNAN on PowerPC.

Backports commit 5d51eaea84899d88cb161fab3f089168e3812e9e from qemu
2018-03-02 00:15:36 -05:00
Richard Henderson 5c4f79ac62
target-hppa: Add softfloat specializations
Like the original MIPS, HPPA has the MSB of an SNaN set.
However, it has different rules for silencing an SNaN:
(1) msb is cleared and (2) msb-1 must be set if the fraction
is now zero, and (implementation defined) may be set always.
I haven't checked real hardware but chose the set always
alternative because it's easy and within spec.

Backports commit 005fa38d86257d471ac461c066a5409a9f5ebb02 from qemu
2018-03-01 23:42:09 -05:00
Andrew Dutcher 26b36e5ff8
fpu: add mechanism to check for invalid long double formats
All operations that take a floatx80 as an operand need to have their
inputs checked for malformed encodings. In all of these cases, use the
function floatx80_invalid_encoding to perform the check. If an invalid
operand is found, raise an invalid operation exception, and then return
either NaN (for fp-typed results) or the integer indefinite value (the
minimum representable signed integer value, for int-typed results).

For the non-quiet comparison operations, this touches adjacent code in
order to pass style checks.

Backports cast correction portion of commit d1eb8f2acba579830cf3798c3c15ce51be852c56m from qemu
2018-02-26 02:27:40 -05:00
Pranith Kumar 1b19fe260a
softfloat: Fix warn about implicit conversion from int to int8_t
Change the flag type to 'uint8_t' to fix the implicit conversion error.

Backports commit dfd607671037ff46d5b16ade10e10efdf0d260be from qemu
2018-02-25 22:54:39 -05:00
Aleksandar Markovic 3e9325f1e9
softfloat: Handle snan_bit_is_one == 0 in MIPS pickNaNMulAdd()
Only for Mips platform, and only for cases when snan_bit_is_one is 0,
correct the order of argument comparisons in pickNaNMulAdd().

For more info, see [1], page 53, section "3.5.3 NaN Propagation".

[1] "MIPS Architecture for Programmers Volume IV-j:
The MIPS32 SIMD Architecture Module",
Imagination Technologies LTD, Revision 1.12, February 3, 2016

Backports commit c27644f0e9659471e1c9355da5b667960d311937 from qemu
2018-02-24 20:40:11 -05:00
Aleksandar Markovic 33833b6605
softfloat: For Mips only, correct default NaN values
Only for Mips platform, and only for cases when snan_bit_is_one is 0,
correct default NaN values (in their 16-, 32-, and 64-bit flavors).

For more info, see [1], page 84, Table 6.3 "Value Supplied When a New
Quiet NaN Is Created", and [2], page 52, Table 3.7 "Default NaN
Encodings".

[1] "MIPS Architecture For Programmers Volume II-A:
The MIPS64 Instruction Set Reference Manual",
Imagination Technologies LTD, Revision 6.04, November 13, 2015

[2] "MIPS Architecture for Programmers Volume IV-j:
The MIPS32 SIMD Architecture Module",
Imagination Technologies LTD, Revision 1.12, February 3, 2016

Backports commit a7c04d545a97126c9df9d96623747d8613aaf7db from qemu
2018-02-24 20:38:23 -05:00
Aleksandar Markovic 33ee9429b2
softfloat: Clean code format in fpu/softfloat-specialize.h
fpu/softfloat-specialize.h is the most critical file in SoftFloat
library, since it handles numerous differences between platforms in
relation to floating point arithmetics. This patch makes the code
in this file more consistent format-wise, and hopefully easier to
debug and maintain.

Backports commit a59eaea64686c8966b7653303660f8c26f285c77 from qemu
2018-02-24 20:35:05 -05:00