2015-08-21 07:04:50 +00:00
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/* Autogen header for Unicorn Engine - DONOT MODIFY */
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#ifndef UNICORN_AUTOGEN_ARM_H
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#define UNICORN_AUTOGEN_ARM_H
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2018-02-26 00:07:14 +00:00
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#define ErrorClass_lookup ErrorClass_lookup_arm
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#define S0 S0_arm
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#define S1 S1_arm
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#define X86CPURegister32_lookup X86CPURegister32_lookup_arm
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#define _DYNAMIC _DYNAMIC_arm
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#define _GLOBAL_OFFSET_TABLE_ _GLOBAL_OFFSET_TABLE__arm
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#define __jit_debug_descriptor __jit_debug_descriptor_arm
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#define __jit_debug_register_code __jit_debug_register_code_arm
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#define _edata _edata_arm
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#define _end _end_arm
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#define _fini _fini_arm
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#define _init _init_arm
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2015-08-21 07:04:50 +00:00
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#define a15_l2ctlr_read a15_l2ctlr_read_arm
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#define a64_translate_init a64_translate_init_arm
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#define aa32_generate_debug_exceptions aa32_generate_debug_exceptions_arm
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#define aa64_cacheop_access aa64_cacheop_access_arm
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#define aa64_daif_access aa64_daif_access_arm
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#define aa64_daif_write aa64_daif_write_arm
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#define aa64_dczid_read aa64_dczid_read_arm
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#define aa64_fpcr_read aa64_fpcr_read_arm
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#define aa64_fpcr_write aa64_fpcr_write_arm
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#define aa64_fpsr_read aa64_fpsr_read_arm
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#define aa64_fpsr_write aa64_fpsr_write_arm
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#define aa64_generate_debug_exceptions aa64_generate_debug_exceptions_arm
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#define aa64_zva_access aa64_zva_access_arm
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#define aarch64_banked_spsr_index aarch64_banked_spsr_index_arm
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#define aarch64_restore_sp aarch64_restore_sp_arm
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#define aarch64_save_sp aarch64_save_sp_arm
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2018-02-26 00:07:14 +00:00
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#define aarch64_sync_32_to_64 aarch64_sync_32_to_64_arm
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#define aarch64_sync_64_to_32 aarch64_sync_64_to_32_arm
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#define aarch64_tb_set_jmp_target aarch64_tb_set_jmp_target_arm
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2015-08-21 07:04:50 +00:00
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#define accel_find accel_find_arm
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#define accel_init_machine accel_init_machine_arm
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#define accel_type accel_type_arm
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#define access_with_adjusted_size access_with_adjusted_size_arm
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#define add128 add128_arm
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#define add16_sat add16_sat_arm
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#define add16_usat add16_usat_arm
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#define add192 add192_arm
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#define add8_sat add8_sat_arm
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#define add8_usat add8_usat_arm
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#define addFloat128Sigs addFloat128Sigs_arm
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#define addFloat32Sigs addFloat32Sigs_arm
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#define addFloat64Sigs addFloat64Sigs_arm
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#define addFloatx80Sigs addFloatx80Sigs_arm
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2018-02-26 00:07:14 +00:00
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#define add_cpreg_to_hashtable add_cpreg_to_hashtable_arm
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#define add_cpreg_to_list add_cpreg_to_list_arm
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2015-08-21 07:04:50 +00:00
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#define add_qemu_ldst_label add_qemu_ldst_label_arm
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#define address_space_access_valid address_space_access_valid_arm
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2018-03-01 15:10:15 +00:00
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#define address_space_cache_destroy address_space_cache_destroy_arm
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#define address_space_cache_init address_space_cache_init_arm
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#define address_space_cache_invalidate address_space_cache_invalidate_arm
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2015-08-21 07:04:50 +00:00
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#define address_space_destroy address_space_destroy_arm
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2018-03-12 01:34:55 +00:00
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#define address_space_dispatch_compact address_space_dispatch_compact_arm
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2018-03-12 00:33:08 +00:00
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#define address_space_dispatch_free address_space_dispatch_free_arm
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2018-03-12 01:34:55 +00:00
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#define address_space_dispatch_new address_space_dispatch_new_arm
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2015-08-21 07:04:50 +00:00
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#define address_space_get_flatview address_space_get_flatview_arm
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#define address_space_init address_space_init_arm
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#define address_space_init_dispatch address_space_init_dispatch_arm
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2018-03-01 18:03:39 +00:00
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#define address_space_get_iotlb_entry address_space_get_iotlb_entry_arm
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2018-02-26 00:07:14 +00:00
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#define address_space_ldl address_space_ldl_arm
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#define address_space_ldl_be address_space_ldl_be_arm
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2018-03-01 15:10:15 +00:00
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#define address_space_ldl_be_cached address_space_ldl_be_cached_arm
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#define address_space_ldl_cached address_space_ldl_cached_arm
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2018-02-26 00:07:14 +00:00
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#define address_space_ldl_le address_space_ldl_le_arm
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2018-03-01 15:10:15 +00:00
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#define address_space_ldl_le_cached address_space_ldl_le_cached_arm
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2018-02-26 00:07:14 +00:00
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#define address_space_ldq address_space_ldq_arm
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#define address_space_ldq_be address_space_ldq_be_arm
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2018-03-01 15:10:15 +00:00
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#define address_space_ldq_be_cached address_space_ldq_be_cached_arm
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#define address_space_ldq_cached address_space_ldq_cached_arm
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2018-02-26 00:07:14 +00:00
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#define address_space_ldq_le address_space_ldq_le_arm
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2018-03-01 15:10:15 +00:00
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#define address_space_ldq_le_cached address_space_ldq_le_cached_arm
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2018-02-26 00:07:14 +00:00
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#define address_space_ldub address_space_ldub_arm
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2018-03-01 15:10:15 +00:00
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#define address_space_ldub_cached address_space_ldub_cached_arm
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2018-02-26 00:07:14 +00:00
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#define address_space_lduw address_space_lduw_arm
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#define address_space_lduw_be address_space_lduw_be_arm
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2018-03-01 15:10:15 +00:00
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#define address_space_lduw_be_cached address_space_lduw_be_cached_arm
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#define address_space_lduw_cached address_space_lduw_cached_arm
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2018-02-26 00:07:14 +00:00
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#define address_space_lduw_le address_space_lduw_le_arm
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2018-03-01 15:10:15 +00:00
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#define address_space_lduw_le_cached address_space_lduw_le_cached_arm
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2015-08-21 07:04:50 +00:00
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#define address_space_lookup_region address_space_lookup_region_arm
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#define address_space_map address_space_map_arm
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#define address_space_rw address_space_rw_arm
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2018-02-26 00:07:14 +00:00
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#define address_space_stb address_space_stb_arm
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2018-03-01 15:10:15 +00:00
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#define address_space_stb_cached address_space_stb_cached_arm
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2018-02-26 00:07:14 +00:00
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#define address_space_stl address_space_stl_arm
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#define address_space_stl_be address_space_stl_be_arm
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2018-03-01 15:10:15 +00:00
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#define address_space_stl_be_cached address_space_stl_be_cached_arm
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#define address_space_stl_cached address_space_stl_cached_arm
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2018-02-26 00:07:14 +00:00
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#define address_space_stl_le address_space_stl_le_arm
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2018-03-01 15:10:15 +00:00
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#define address_space_stl_le_cached address_space_stl_le_cached_arm
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2018-02-26 00:07:14 +00:00
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#define address_space_stl_notdirty address_space_stl_notdirty_arm
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2018-03-01 15:10:15 +00:00
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#define address_space_stl_notdirty_cached address_space_stl_notdirty_cached_arm
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2018-02-26 00:07:14 +00:00
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#define address_space_stq address_space_stq_arm
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#define address_space_stq_be address_space_stq_be_arm
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2018-03-01 15:10:15 +00:00
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#define address_space_stq_be_cached address_space_stq_be_cached_arm
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#define address_space_stq_cached address_space_stq_cached_arm
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2018-02-26 00:07:14 +00:00
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#define address_space_stq_le address_space_stq_le_arm
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2018-03-01 15:10:15 +00:00
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#define address_space_stq_le_cached address_space_stq_le_cached_arm
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2018-02-26 00:07:14 +00:00
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#define address_space_stw address_space_stw_arm
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#define address_space_stw_be address_space_stw_be_arm
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2018-03-01 15:10:15 +00:00
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#define address_space_stw_be_cached address_space_stw_be_cached_arm
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#define address_space_stw_cached address_space_stw_cached_arm
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2018-02-26 00:07:14 +00:00
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#define address_space_stw_le address_space_stw_le_arm
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2018-03-01 15:10:15 +00:00
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#define address_space_stw_le_cached address_space_stw_le_cached_arm
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2018-03-12 00:33:08 +00:00
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#define address_space_to_dispatch address_space_to_dispatch_arm
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2018-03-12 00:57:29 +00:00
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#define address_space_to_flatview address_space_to_flatview_arm
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2015-08-21 07:04:50 +00:00
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#define address_space_translate_for_iotlb address_space_translate_for_iotlb_arm
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#define address_space_translate_internal address_space_translate_internal_arm
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#define address_space_unmap address_space_unmap_arm
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2018-02-26 00:07:14 +00:00
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#define address_space_unregister address_space_unregister_arm
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2015-08-21 07:04:50 +00:00
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#define address_space_update_topology address_space_update_topology_arm
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#define address_space_update_topology_pass address_space_update_topology_pass_arm
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#define address_space_write address_space_write_arm
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#define addrrange_contains addrrange_contains_arm
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#define addrrange_end addrrange_end_arm
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#define addrrange_equal addrrange_equal_arm
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#define addrrange_intersection addrrange_intersection_arm
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#define addrrange_intersects addrrange_intersects_arm
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#define addrrange_make addrrange_make_arm
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#define adjust_endianness adjust_endianness_arm
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#define all_helpers all_helpers_arm
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#define alloc_code_gen_buffer alloc_code_gen_buffer_arm
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#define alloc_entry alloc_entry_arm
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#define always_true always_true_arm
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#define arm1026_initfn arm1026_initfn_arm
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#define arm1136_initfn arm1136_initfn_arm
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#define arm1136_r2_initfn arm1136_r2_initfn_arm
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#define arm1176_initfn arm1176_initfn_arm
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#define arm11mpcore_initfn arm11mpcore_initfn_arm
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#define arm926_initfn arm926_initfn_arm
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#define arm946_initfn arm946_initfn_arm
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2018-03-02 05:24:19 +00:00
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#define arm_adjust_watchpoint_address arm_adjust_watchpoint_address_arm
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2015-08-21 07:04:50 +00:00
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#define arm_ccnt_enabled arm_ccnt_enabled_arm
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#define arm_cp_read_zero arm_cp_read_zero_arm
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#define arm_cp_reset_ignore arm_cp_reset_ignore_arm
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2018-02-26 00:07:14 +00:00
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#define arm_cp_write_ignore arm_cp_write_ignore_arm
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2015-08-21 07:04:50 +00:00
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#define arm_cpu_do_interrupt arm_cpu_do_interrupt_arm
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2018-03-05 02:25:04 +00:00
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#define arm_cpu_do_transaction_failed arm_cpu_do_transaction_failed_arm
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2018-02-26 00:07:14 +00:00
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#define arm_cpu_do_unaligned_access arm_cpu_do_unaligned_access_arm
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2015-08-21 07:04:50 +00:00
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#define arm_cpu_exec_interrupt arm_cpu_exec_interrupt_arm
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#define arm_cpu_finalizefn arm_cpu_finalizefn_arm
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2018-02-19 03:14:34 +00:00
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#define arm_cpu_get_phys_page_attrs_debug arm_cpu_get_phys_page_attrs_debug_arm
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2015-08-21 07:04:50 +00:00
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#define arm_cpu_initfn arm_cpu_initfn_arm
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#define arm_cpu_list arm_cpu_list_arm
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#define arm_cpu_post_init arm_cpu_post_init_arm
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#define arm_cpu_realizefn arm_cpu_realizefn_arm
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#define arm_cpu_register_gdb_regs_for_features arm_cpu_register_gdb_regs_for_features_arm
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#define arm_cpu_register_types arm_cpu_register_types_arm
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#define arm_cpu_set_pc arm_cpu_set_pc_arm
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2018-11-17 02:53:21 +00:00
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#define arm_cpu_update_virq arm_cpu_update_virq_arm
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#define arm_cpu_update_vfiq arm_cpu_update_vfiq_arm
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2018-02-26 00:07:14 +00:00
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#define arm_cpus arm_cpus_arm
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2015-08-21 07:04:50 +00:00
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#define arm_current_el arm_current_el_arm
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#define arm_dc_feature arm_dc_feature_arm
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2018-02-20 16:50:26 +00:00
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#define arm_debug_check_watchpoint arm_debug_check_watchpoint_arm
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2015-08-21 07:04:50 +00:00
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#define arm_debug_excp_handler arm_debug_excp_handler_arm
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#define arm_debug_target_el arm_debug_target_el_arm
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#define arm_el_is_aa64 arm_el_is_aa64_arm
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#define arm_env_get_cpu arm_env_get_cpu_arm
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#define arm_excp_unmasked arm_excp_unmasked_arm
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#define arm_feature arm_feature_arm
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2018-02-11 04:42:08 +00:00
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#define arm_free_cc arm_free_cc_arm
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#define arm_gen_test_cc arm_gen_test_cc_arm
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2018-02-26 00:07:14 +00:00
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#define arm_generate_debug_exceptions arm_generate_debug_exceptions_arm
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2018-02-15 01:14:33 +00:00
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#define arm_gt_htimer_cb arm_gt_htimer_cb_arm
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2018-02-26 00:07:14 +00:00
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#define arm_gt_ptimer_cb arm_gt_ptimer_cb_arm
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2018-02-15 01:42:45 +00:00
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#define arm_gt_stimer_cb arm_gt_stimer_cb_arm
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2018-02-26 00:07:14 +00:00
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#define arm_gt_vtimer_cb arm_gt_vtimer_cb_arm
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2015-08-21 07:04:50 +00:00
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#define arm_handle_psci_call arm_handle_psci_call_arm
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#define arm_is_psci_call arm_is_psci_call_arm
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#define arm_is_secure arm_is_secure_arm
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#define arm_is_secure_below_el3 arm_is_secure_below_el3_arm
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2018-02-11 04:42:08 +00:00
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#define arm_jump_cc arm_jump_cc_arm
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#define arm_ldl_code arm_ldl_code_arm
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#define arm_lduw_code arm_lduw_code_arm
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#define arm_log_exception arm_log_exception_arm
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2018-02-13 03:40:02 +00:00
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#define arm_phys_excp_target_el arm_phys_excp_target_el_arm
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2015-08-21 07:04:50 +00:00
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#define arm_reg_read arm_reg_read_arm
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#define arm_reg_reset arm_reg_reset_arm
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#define arm_reg_write arm_reg_write_arm
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#define arm_release arm_release_arm
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#define arm_rmode_to_sf arm_rmode_to_sf_arm
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2018-02-26 00:07:14 +00:00
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#define arm_s1_regime_using_lpae_format arm_s1_regime_using_lpae_format_arm
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2015-08-21 07:04:50 +00:00
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#define arm_singlestep_active arm_singlestep_active_arm
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2018-02-11 04:42:08 +00:00
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#define arm_test_cc arm_test_cc_arm
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2015-08-21 07:04:50 +00:00
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#define arm_translate_init arm_translate_init_arm
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#define arm_v7m_class_init arm_v7m_class_init_arm
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#define arm_v7m_cpu_do_interrupt arm_v7m_cpu_do_interrupt_arm
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#define ats_access ats_access_arm
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#define ats_write ats_write_arm
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#define bad_mode_switch bad_mode_switch_arm
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#define bank_number bank_number_arm
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#define bitmap_zero_extend bitmap_zero_extend_arm
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#define bp_wp_matches bp_wp_matches_arm
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#define breakpoint_invalidate breakpoint_invalidate_arm
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#define build_page_bitmap build_page_bitmap_arm
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#define bus_add_child bus_add_child_arm
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#define bus_class_init bus_class_init_arm
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#define bus_info bus_info_arm
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#define bus_unparent bus_unparent_arm
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#define cache_block_ops_cp_reginfo cache_block_ops_cp_reginfo_arm
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#define cache_dirty_status_cp_reginfo cache_dirty_status_cp_reginfo_arm
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#define cache_test_clean_cp_reginfo cache_test_clean_cp_reginfo_arm
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#define call_recip_estimate call_recip_estimate_arm
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#define can_merge can_merge_arm
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#define capacity_increase capacity_increase_arm
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#define ccsidr_read ccsidr_read_arm
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#define check_ap check_ap_arm
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#define check_breakpoints check_breakpoints_arm
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#define check_exit_request check_exit_request_arm
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#define check_watchpoints check_watchpoints_arm
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#define cho cho_arm
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#define clear_bit clear_bit_arm
|
|
|
|
#define clz32 clz32_arm
|
|
|
|
#define clz64 clz64_arm
|
|
|
|
#define cmp_flatrange_addr cmp_flatrange_addr_arm
|
|
|
|
#define code_gen_alloc code_gen_alloc_arm
|
|
|
|
#define commonNaNToFloat128 commonNaNToFloat128_arm
|
|
|
|
#define commonNaNToFloat16 commonNaNToFloat16_arm
|
|
|
|
#define commonNaNToFloat32 commonNaNToFloat32_arm
|
|
|
|
#define commonNaNToFloat64 commonNaNToFloat64_arm
|
|
|
|
#define commonNaNToFloatx80 commonNaNToFloatx80_arm
|
|
|
|
#define compute_abs_deadline compute_abs_deadline_arm
|
|
|
|
#define cond_name cond_name_arm
|
|
|
|
#define configure_accelerator configure_accelerator_arm
|
|
|
|
#define container_get container_get_arm
|
|
|
|
#define container_info container_info_arm
|
|
|
|
#define container_register_types container_register_types_arm
|
|
|
|
#define contextidr_write contextidr_write_arm
|
|
|
|
#define core_log_global_start core_log_global_start_arm
|
|
|
|
#define core_log_global_stop core_log_global_stop_arm
|
|
|
|
#define core_memory_listener core_memory_listener_arm
|
|
|
|
#define cortex_a15_initfn cortex_a15_initfn_arm
|
|
|
|
#define cortex_a8_initfn cortex_a8_initfn_arm
|
|
|
|
#define cortex_a9_initfn cortex_a9_initfn_arm
|
|
|
|
#define cortex_m3_initfn cortex_m3_initfn_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define cortexa15_cp_reginfo cortexa15_cp_reginfo_arm
|
|
|
|
#define cortexa8_cp_reginfo cortexa8_cp_reginfo_arm
|
|
|
|
#define cortexa9_cp_reginfo cortexa9_cp_reginfo_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define countLeadingZeros32 countLeadingZeros32_arm
|
|
|
|
#define countLeadingZeros64 countLeadingZeros64_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define count_cpreg count_cpreg_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define cp_access_ok cp_access_ok_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define cp_reg_reset cp_reg_reset_arm
|
|
|
|
#define cp_reginfo cp_reginfo_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define cpacr_write cpacr_write_arm
|
|
|
|
#define cpreg_field_is_64bit cpreg_field_is_64bit_arm
|
|
|
|
#define cpreg_key_compare cpreg_key_compare_arm
|
|
|
|
#define cpreg_make_keylist cpreg_make_keylist_arm
|
|
|
|
#define cpreg_to_kvm_id cpreg_to_kvm_id_arm
|
|
|
|
#define cpsr_read cpsr_read_arm
|
|
|
|
#define cpsr_write cpsr_write_arm
|
|
|
|
#define cptype_valid cptype_valid_arm
|
|
|
|
#define cpu_abort cpu_abort_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define cpu_address_space_init cpu_address_space_init_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define cpu_breakpoint_insert cpu_breakpoint_insert_arm
|
|
|
|
#define cpu_breakpoint_remove cpu_breakpoint_remove_arm
|
|
|
|
#define cpu_breakpoint_remove_all cpu_breakpoint_remove_all_arm
|
|
|
|
#define cpu_breakpoint_remove_by_ref cpu_breakpoint_remove_by_ref_arm
|
|
|
|
#define cpu_can_do_io cpu_can_do_io_arm
|
|
|
|
#define cpu_can_run cpu_can_run_arm
|
|
|
|
#define cpu_class_init cpu_class_init_arm
|
|
|
|
#define cpu_common_class_by_name cpu_common_class_by_name_arm
|
|
|
|
#define cpu_common_exec_interrupt cpu_common_exec_interrupt_arm
|
|
|
|
#define cpu_common_get_arch_id cpu_common_get_arch_id_arm
|
|
|
|
#define cpu_common_get_memory_mapping cpu_common_get_memory_mapping_arm
|
|
|
|
#define cpu_common_get_paging_enabled cpu_common_get_paging_enabled_arm
|
|
|
|
#define cpu_common_has_work cpu_common_has_work_arm
|
|
|
|
#define cpu_common_initfn cpu_common_initfn_arm
|
|
|
|
#define cpu_common_noop cpu_common_noop_arm
|
|
|
|
#define cpu_common_parse_features cpu_common_parse_features_arm
|
|
|
|
#define cpu_common_realizefn cpu_common_realizefn_arm
|
|
|
|
#define cpu_common_reset cpu_common_reset_arm
|
|
|
|
#define cpu_dump_statistics cpu_dump_statistics_arm
|
2018-03-20 10:57:26 +00:00
|
|
|
#define cpu_exec cpu_exec_arm
|
2018-03-21 11:57:39 +00:00
|
|
|
#define cpu_exec_exit cpu_exec_exit_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define cpu_exec_init cpu_exec_init_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define cpu_exec_init_all cpu_exec_init_all_arm
|
2018-02-27 16:12:36 +00:00
|
|
|
#define cpu_exec_step_atomic cpu_exec_step_atomic_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define cpu_flush_icache_range cpu_flush_icache_range_arm
|
|
|
|
#define cpu_gen_init cpu_gen_init_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define cpu_get_address_space cpu_get_address_space_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define cpu_get_clock cpu_get_clock_arm
|
|
|
|
#define cpu_get_real_ticks cpu_get_real_ticks_arm
|
|
|
|
#define cpu_get_tb_cpu_state cpu_get_tb_cpu_state_arm
|
|
|
|
#define cpu_handle_debug_exception cpu_handle_debug_exception_arm
|
|
|
|
#define cpu_handle_guest_debug cpu_handle_guest_debug_arm
|
|
|
|
#define cpu_inb cpu_inb_arm
|
|
|
|
#define cpu_inl cpu_inl_arm
|
|
|
|
#define cpu_interrupt cpu_interrupt_arm
|
|
|
|
#define cpu_interrupt_handler cpu_interrupt_handler_arm
|
|
|
|
#define cpu_inw cpu_inw_arm
|
|
|
|
#define cpu_io_recompile cpu_io_recompile_arm
|
|
|
|
#define cpu_is_stopped cpu_is_stopped_arm
|
|
|
|
#define cpu_ldl_code cpu_ldl_code_arm
|
|
|
|
#define cpu_ldub_code cpu_ldub_code_arm
|
|
|
|
#define cpu_lduw_code cpu_lduw_code_arm
|
2018-02-24 22:24:41 +00:00
|
|
|
#define cpu_loop_exit cpu_loop_exit_arm
|
2018-02-27 16:12:36 +00:00
|
|
|
#define cpu_loop_exit_atomic cpu_loop_exit_atomic_arm
|
2018-02-24 22:24:41 +00:00
|
|
|
#define cpu_loop_exit_noexc cpu_loop_exit_noexc_arm
|
|
|
|
#define cpu_loop_exit_restore cpu_loop_exit_restore_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define cpu_memory_rw_debug cpu_memory_rw_debug_arm
|
|
|
|
#define cpu_outb cpu_outb_arm
|
|
|
|
#define cpu_outl cpu_outl_arm
|
|
|
|
#define cpu_outw cpu_outw_arm
|
2018-02-13 14:30:20 +00:00
|
|
|
#define cpu_physical_memory_all_dirty cpu_physical_memory_all_dirty_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define cpu_physical_memory_clear_dirty_range cpu_physical_memory_clear_dirty_range_arm
|
|
|
|
#define cpu_physical_memory_is_clean cpu_physical_memory_is_clean_arm
|
|
|
|
#define cpu_physical_memory_is_io cpu_physical_memory_is_io_arm
|
|
|
|
#define cpu_physical_memory_map cpu_physical_memory_map_arm
|
|
|
|
#define cpu_physical_memory_range_includes_clean cpu_physical_memory_range_includes_clean_arm
|
|
|
|
#define cpu_physical_memory_reset_dirty cpu_physical_memory_reset_dirty_arm
|
|
|
|
#define cpu_physical_memory_rw cpu_physical_memory_rw_arm
|
|
|
|
#define cpu_physical_memory_unmap cpu_physical_memory_unmap_arm
|
|
|
|
#define cpu_physical_memory_write_rom cpu_physical_memory_write_rom_arm
|
|
|
|
#define cpu_physical_memory_write_rom_internal cpu_physical_memory_write_rom_internal_arm
|
|
|
|
#define cpu_register cpu_register_arm
|
|
|
|
#define cpu_register_types cpu_register_types_arm
|
|
|
|
#define cpu_restore_state cpu_restore_state_arm
|
|
|
|
#define cpu_restore_state_from_tb cpu_restore_state_from_tb_arm
|
|
|
|
#define cpu_single_step cpu_single_step_arm
|
|
|
|
#define cpu_tb_exec cpu_tb_exec_arm
|
|
|
|
#define cpu_to_be64 cpu_to_be64_arm
|
|
|
|
#define cpu_to_le32 cpu_to_le32_arm
|
|
|
|
#define cpu_to_le64 cpu_to_le64_arm
|
|
|
|
#define cpu_type_info cpu_type_info_arm
|
|
|
|
#define cpu_unassigned_access cpu_unassigned_access_arm
|
|
|
|
#define cpu_watchpoint_address_matches cpu_watchpoint_address_matches_arm
|
|
|
|
#define cpu_watchpoint_insert cpu_watchpoint_insert_arm
|
|
|
|
#define cpu_watchpoint_remove cpu_watchpoint_remove_arm
|
|
|
|
#define cpu_watchpoint_remove_all cpu_watchpoint_remove_all_arm
|
|
|
|
#define cpu_watchpoint_remove_by_ref cpu_watchpoint_remove_by_ref_arm
|
|
|
|
#define crc32c_table crc32c_table_arm
|
|
|
|
#define create_new_memory_mapping create_new_memory_mapping_arm
|
|
|
|
#define csselr_write csselr_write_arm
|
|
|
|
#define cto32 cto32_arm
|
|
|
|
#define ctr_el0_access ctr_el0_access_arm
|
|
|
|
#define ctz32 ctz32_arm
|
|
|
|
#define ctz64 ctz64_arm
|
|
|
|
#define dacr_write dacr_write_arm
|
|
|
|
#define dbgbcr_write dbgbcr_write_arm
|
|
|
|
#define dbgbvr_write dbgbvr_write_arm
|
|
|
|
#define dbgwcr_write dbgwcr_write_arm
|
|
|
|
#define dbgwvr_write dbgwvr_write_arm
|
|
|
|
#define debug_cp_reginfo debug_cp_reginfo_arm
|
|
|
|
#define debug_frame debug_frame_arm
|
|
|
|
#define debug_lpae_cp_reginfo debug_lpae_cp_reginfo_arm
|
|
|
|
#define define_arm_cp_regs define_arm_cp_regs_arm
|
|
|
|
#define define_arm_cp_regs_with_opaque define_arm_cp_regs_with_opaque_arm
|
|
|
|
#define define_debug_regs define_debug_regs_arm
|
|
|
|
#define define_one_arm_cp_reg define_one_arm_cp_reg_arm
|
|
|
|
#define define_one_arm_cp_reg_with_opaque define_one_arm_cp_reg_with_opaque_arm
|
|
|
|
#define deregister_tm_clones deregister_tm_clones_arm
|
|
|
|
#define device_class_base_init device_class_base_init_arm
|
|
|
|
#define device_class_init device_class_init_arm
|
|
|
|
#define device_finalize device_finalize_arm
|
|
|
|
#define device_get_realized device_get_realized_arm
|
|
|
|
#define device_initfn device_initfn_arm
|
|
|
|
#define device_post_init device_post_init_arm
|
|
|
|
#define device_reset device_reset_arm
|
|
|
|
#define device_set_realized device_set_realized_arm
|
|
|
|
#define device_type_info device_type_info_arm
|
|
|
|
#define disas_arm_insn disas_arm_insn_arm
|
|
|
|
#define disas_coproc_insn disas_coproc_insn_arm
|
|
|
|
#define disas_dsp_insn disas_dsp_insn_arm
|
|
|
|
#define disas_iwmmxt_insn disas_iwmmxt_insn_arm
|
|
|
|
#define disas_neon_data_insn disas_neon_data_insn_arm
|
|
|
|
#define disas_neon_ls_insn disas_neon_ls_insn_arm
|
|
|
|
#define disas_thumb2_insn disas_thumb2_insn_arm
|
|
|
|
#define disas_thumb_insn disas_thumb_insn_arm
|
|
|
|
#define disas_vfp_insn disas_vfp_insn_arm
|
|
|
|
#define disas_vfp_v8_insn disas_vfp_v8_insn_arm
|
|
|
|
#define do_arm_semihosting do_arm_semihosting_arm
|
|
|
|
#define do_clz16 do_clz16_arm
|
|
|
|
#define do_clz8 do_clz8_arm
|
|
|
|
#define do_constant_folding do_constant_folding_arm
|
|
|
|
#define do_constant_folding_2 do_constant_folding_2_arm
|
|
|
|
#define do_constant_folding_cond do_constant_folding_cond_arm
|
|
|
|
#define do_constant_folding_cond2 do_constant_folding_cond2_arm
|
|
|
|
#define do_constant_folding_cond_32 do_constant_folding_cond_32_arm
|
|
|
|
#define do_constant_folding_cond_64 do_constant_folding_cond_64_arm
|
|
|
|
#define do_constant_folding_cond_eq do_constant_folding_cond_eq_arm
|
|
|
|
#define do_fcvt_f16_to_f32 do_fcvt_f16_to_f32_arm
|
|
|
|
#define do_fcvt_f32_to_f16 do_fcvt_f32_to_f16_arm
|
|
|
|
#define do_ssat do_ssat_arm
|
|
|
|
#define do_usad do_usad_arm
|
|
|
|
#define do_usat do_usat_arm
|
|
|
|
#define do_v7m_exception_exit do_v7m_exception_exit_arm
|
|
|
|
#define dummy_c15_cp_reginfo dummy_c15_cp_reginfo_arm
|
|
|
|
#define dummy_func dummy_func_arm
|
|
|
|
#define dummy_section dummy_section_arm
|
2018-03-06 17:19:54 +00:00
|
|
|
#define dup_const_impl dup_const_impl_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define end_list end_list_arm
|
2018-02-13 18:15:32 +00:00
|
|
|
#define ensure_writable_pages ensure_writable_pages_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define eq128 eq128_arm
|
|
|
|
#define error_copy error_copy_arm
|
|
|
|
#define error_exit error_exit_arm
|
|
|
|
#define error_get_class error_get_class_arm
|
|
|
|
#define error_get_pretty error_get_pretty_arm
|
error: On abort, report where the error was created
This is particularly useful when we abort in error_propagate(),
because there the stack backtrace doesn't lead to where the error was
created. Looks like this:
Unexpected error in parse_block_error_action() at .../qemu/blockdev.c:322:
qemu-system-x86_64: -drive if=none,werror=foo: 'foo' invalid write error action
Aborted (core dumped)
Note: to get this example output, I monkey-patched drive_new() to pass
&error_abort to blockdev_init().
To keep the error handling boiler plate from growing even more, all
error_setFOO() become macros expanding into error_setFOO_internal()
with additional __FILE__, __LINE__, __func__ arguments. Not exactly
pretty, but it works.
The macro trickery breaks down when you take the address of an
error_setFOO(). Fortunately, we do that in just one place: qemu-ga's
Windows VSS provider and requester DLL wants to call
error_setg_win32() through a function pointer "to avoid linking glib
to the DLL". Use error_setg_win32_internal() there. The use of the
function pointer is already wrapped in a macro, so the churn isn't
bad.
Code size increases by some 35KiB for me (0.7%). Tolerable. Could be
less if we passed relative rather than absolute source file names to
the compiler, or forwent reporting __func__.
Backports commit 1e9b65bb1bad51735cab6c861c29b592dccabf0e from qemu
2018-02-15 16:40:27 +00:00
|
|
|
#define error_setg_file_open_internal error_setg_file_open_internal_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define estimateDiv128To64 estimateDiv128To64_arm
|
|
|
|
#define estimateSqrt32 estimateSqrt32_arm
|
|
|
|
#define excnames excnames_arm
|
|
|
|
#define excp_is_internal excp_is_internal_arm
|
|
|
|
#define extended_addresses_enabled extended_addresses_enabled_arm
|
|
|
|
#define extended_mpu_ap_bits extended_mpu_ap_bits_arm
|
|
|
|
#define extract32 extract32_arm
|
|
|
|
#define extract64 extract64_arm
|
|
|
|
#define extractFloat128Exp extractFloat128Exp_arm
|
|
|
|
#define extractFloat128Frac0 extractFloat128Frac0_arm
|
|
|
|
#define extractFloat128Frac1 extractFloat128Frac1_arm
|
|
|
|
#define extractFloat128Sign extractFloat128Sign_arm
|
|
|
|
#define extractFloat16Exp extractFloat16Exp_arm
|
|
|
|
#define extractFloat16Frac extractFloat16Frac_arm
|
|
|
|
#define extractFloat16Sign extractFloat16Sign_arm
|
|
|
|
#define extractFloat32Exp extractFloat32Exp_arm
|
|
|
|
#define extractFloat32Frac extractFloat32Frac_arm
|
|
|
|
#define extractFloat32Sign extractFloat32Sign_arm
|
|
|
|
#define extractFloat64Exp extractFloat64Exp_arm
|
|
|
|
#define extractFloat64Frac extractFloat64Frac_arm
|
|
|
|
#define extractFloat64Sign extractFloat64Sign_arm
|
|
|
|
#define extractFloatx80Exp extractFloatx80Exp_arm
|
|
|
|
#define extractFloatx80Frac extractFloatx80Frac_arm
|
|
|
|
#define extractFloatx80Sign extractFloatx80Sign_arm
|
|
|
|
#define fcse_write fcse_write_arm
|
|
|
|
#define find_better_copy find_better_copy_arm
|
|
|
|
#define find_default_machine find_default_machine_arm
|
|
|
|
#define find_desc_by_name find_desc_by_name_arm
|
|
|
|
#define find_first_bit find_first_bit_arm
|
|
|
|
#define find_paging_enabled_cpu find_paging_enabled_cpu_arm
|
|
|
|
#define find_ram_block find_ram_block_arm
|
|
|
|
#define find_ram_offset find_ram_offset_arm
|
|
|
|
#define find_string find_string_arm
|
|
|
|
#define find_type find_type_arm
|
|
|
|
#define flatrange_equal flatrange_equal_arm
|
2018-03-12 01:34:55 +00:00
|
|
|
#define flatview_add_to_dispatch flatview_add_to_dispatch_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define flatview_destroy flatview_destroy_arm
|
|
|
|
#define flatview_init flatview_init_arm
|
|
|
|
#define flatview_insert flatview_insert_arm
|
|
|
|
#define flatview_lookup flatview_lookup_arm
|
2018-03-12 00:57:29 +00:00
|
|
|
#define flatview_read flatview_read_arm
|
|
|
|
#define flatview_read_continue flatview_read_continue_arm
|
|
|
|
#define flatview_read_full flatview_read_full_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define flatview_ref flatview_ref_arm
|
|
|
|
#define flatview_simplify flatview_simplify_arm
|
2018-03-12 00:33:08 +00:00
|
|
|
#define flatview_to_dispatch flatview_to_dispatch_arm
|
2018-03-12 00:57:29 +00:00
|
|
|
#define flatview_translate flatview_translate_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define flatview_unref flatview_unref_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define float128ToCommonNaN float128ToCommonNaN_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define float128_add float128_add_arm
|
|
|
|
#define float128_compare float128_compare_arm
|
|
|
|
#define float128_compare_internal float128_compare_internal_arm
|
|
|
|
#define float128_compare_quiet float128_compare_quiet_arm
|
|
|
|
#define float128_default_nan float128_default_nan_arm
|
|
|
|
#define float128_div float128_div_arm
|
|
|
|
#define float128_eq float128_eq_arm
|
|
|
|
#define float128_eq_quiet float128_eq_quiet_arm
|
|
|
|
#define float128_is_quiet_nan float128_is_quiet_nan_arm
|
|
|
|
#define float128_is_signaling_nan float128_is_signaling_nan_arm
|
|
|
|
#define float128_le float128_le_arm
|
|
|
|
#define float128_le_quiet float128_le_quiet_arm
|
|
|
|
#define float128_lt float128_lt_arm
|
|
|
|
#define float128_lt_quiet float128_lt_quiet_arm
|
|
|
|
#define float128_mul float128_mul_arm
|
|
|
|
#define float128_rem float128_rem_arm
|
|
|
|
#define float128_round_to_int float128_round_to_int_arm
|
|
|
|
#define float128_scalbn float128_scalbn_arm
|
2018-05-20 02:33:49 +00:00
|
|
|
#define float128_silence_nan float128_silence_nan_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define float128_sqrt float128_sqrt_arm
|
|
|
|
#define float128_sub float128_sub_arm
|
|
|
|
#define float128_to_float32 float128_to_float32_arm
|
|
|
|
#define float128_to_float64 float128_to_float64_arm
|
|
|
|
#define float128_to_floatx80 float128_to_floatx80_arm
|
|
|
|
#define float128_to_int32 float128_to_int32_arm
|
|
|
|
#define float128_to_int32_round_to_zero float128_to_int32_round_to_zero_arm
|
|
|
|
#define float128_to_int64 float128_to_int64_arm
|
|
|
|
#define float128_to_int64_round_to_zero float128_to_int64_round_to_zero_arm
|
2019-02-28 20:19:41 +00:00
|
|
|
#define float128_to_uint32 float128_to_uint32_arm
|
2018-03-02 14:23:44 +00:00
|
|
|
#define float128_to_uint32_round_to_zero float128_to_uint32_round_to_zero_arm
|
|
|
|
#define float128_to_uint64 float128_to_uint64_arm
|
|
|
|
#define float128_to_uint64_round_to_zero float128_to_uint64_round_to_zero_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define float128_unordered float128_unordered_arm
|
|
|
|
#define float128_unordered_quiet float128_unordered_quiet_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define float16ToCommonNaN float16ToCommonNaN_arm
|
2018-03-08 15:16:53 +00:00
|
|
|
#define float16_add float16_add_arm
|
2018-03-08 17:20:35 +00:00
|
|
|
#define float16_compare float16_compare_arm
|
|
|
|
#define float16_compare_quiet float16_compare_quiet_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define float16_default_nan float16_default_nan_arm
|
2018-03-08 15:24:10 +00:00
|
|
|
#define float16_div float16_div_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define float16_is_quiet_nan float16_is_quiet_nan_arm
|
|
|
|
#define float16_is_signaling_nan float16_is_signaling_nan_arm
|
2018-03-08 17:17:28 +00:00
|
|
|
#define float16_max float16_max_arm
|
|
|
|
#define float16_maxnum float16_maxnum_arm
|
|
|
|
#define float16_maxnummag float16_maxnummag_arm
|
|
|
|
#define float16_min float16_min_arm
|
|
|
|
#define float16_minnum float16_minnum_arm
|
|
|
|
#define float16_minnummag float16_minnummag_arm
|
2018-03-08 15:20:37 +00:00
|
|
|
#define float16_mul float16_mul_arm
|
2018-03-08 15:55:02 +00:00
|
|
|
#define float16_muladd float16_muladd_arm
|
2018-03-08 16:55:05 +00:00
|
|
|
#define float16_round_to_int float16_round_to_int_arm
|
2018-03-08 17:15:10 +00:00
|
|
|
#define float16_scalbn float16_scalbn_arm
|
2018-05-20 02:33:49 +00:00
|
|
|
#define float16_silence_nan float16_silence_nan_arm
|
2018-03-08 17:23:13 +00:00
|
|
|
#define float16_sqrt float16_sqrt_arm
|
2018-03-08 14:44:13 +00:00
|
|
|
#define float16_squash_input_denormal float16_squash_input_denormal_arm
|
2018-03-08 15:16:53 +00:00
|
|
|
#define float16_sub float16_sub_arm
|
2018-03-08 17:05:05 +00:00
|
|
|
#define float16_to_int16 float16_to_int16_arm
|
|
|
|
#define float16_to_int16_round_to_zero float16_to_int16_round_to_zero_arm
|
2018-08-25 07:56:48 +00:00
|
|
|
#define float16_to_int16_scalbn float16_to_int16_scalbn_arm
|
2018-03-08 17:05:05 +00:00
|
|
|
#define float16_to_int32 float16_to_int32_arm
|
|
|
|
#define float16_to_int32_round_to_zero float16_to_int32_round_to_zero_arm
|
2018-08-25 07:56:48 +00:00
|
|
|
#define float16_to_int32_scalbn float16_to_int32_scalbn_arm
|
2018-03-08 17:05:05 +00:00
|
|
|
#define float16_to_int64 float16_to_int64_arm
|
|
|
|
#define float16_to_int64_round_to_zero float16_to_int64_round_to_zero_arm
|
2018-08-25 07:56:48 +00:00
|
|
|
#define float16_to_int64_scalbn float16_to_int64_scalbn_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define float16_to_float32 float16_to_float32_arm
|
|
|
|
#define float16_to_float64 float16_to_float64_arm
|
2018-03-08 17:05:05 +00:00
|
|
|
#define float16_to_uint16 float16_to_uint16_arm
|
|
|
|
#define float16_to_uint16_round_to_zero float16_to_uint16_round_to_zero_arm
|
2018-08-25 07:56:48 +00:00
|
|
|
#define float16_to_uint16_scalbn float16_to_uint16_scalbn_arm
|
2018-03-08 17:05:05 +00:00
|
|
|
#define float16_to_uint32 float16_to_uint32_arm
|
|
|
|
#define float16_to_uint32_round_to_zero float16_to_uint32_round_to_zero_arm
|
2018-08-25 07:56:48 +00:00
|
|
|
#define float16_to_uint32_scalbn float16_to_uint32_scalbn_arm
|
2018-03-08 17:05:05 +00:00
|
|
|
#define float16_to_uint64 float16_to_uint64_arm
|
|
|
|
#define float16_to_uint64_round_to_zero float16_to_uint64_round_to_zero_arm
|
2018-08-25 07:56:48 +00:00
|
|
|
#define float16_to_uint64_scalbn float16_to_uint64_scalbn_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define float32ToCommonNaN float32ToCommonNaN_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define float32_abs float32_abs_arm
|
|
|
|
#define float32_add float32_add_arm
|
|
|
|
#define float32_chs float32_chs_arm
|
|
|
|
#define float32_compare float32_compare_arm
|
|
|
|
#define float32_compare_internal float32_compare_internal_arm
|
|
|
|
#define float32_compare_quiet float32_compare_quiet_arm
|
|
|
|
#define float32_default_nan float32_default_nan_arm
|
|
|
|
#define float32_div float32_div_arm
|
|
|
|
#define float32_eq float32_eq_arm
|
|
|
|
#define float32_eq_quiet float32_eq_quiet_arm
|
|
|
|
#define float32_exp2 float32_exp2_arm
|
|
|
|
#define float32_exp2_coefficients float32_exp2_coefficients_arm
|
|
|
|
#define float32_is_any_nan float32_is_any_nan_arm
|
|
|
|
#define float32_is_infinity float32_is_infinity_arm
|
|
|
|
#define float32_is_neg float32_is_neg_arm
|
|
|
|
#define float32_is_quiet_nan float32_is_quiet_nan_arm
|
|
|
|
#define float32_is_signaling_nan float32_is_signaling_nan_arm
|
|
|
|
#define float32_is_zero float32_is_zero_arm
|
|
|
|
#define float32_is_zero_or_denormal float32_is_zero_or_denormal_arm
|
|
|
|
#define float32_le float32_le_arm
|
|
|
|
#define float32_le_quiet float32_le_quiet_arm
|
|
|
|
#define float32_log2 float32_log2_arm
|
|
|
|
#define float32_lt float32_lt_arm
|
|
|
|
#define float32_lt_quiet float32_lt_quiet_arm
|
|
|
|
#define float32_max float32_max_arm
|
|
|
|
#define float32_maxnum float32_maxnum_arm
|
|
|
|
#define float32_maxnummag float32_maxnummag_arm
|
|
|
|
#define float32_min float32_min_arm
|
|
|
|
#define float32_minmax float32_minmax_arm
|
|
|
|
#define float32_minnum float32_minnum_arm
|
|
|
|
#define float32_minnummag float32_minnummag_arm
|
|
|
|
#define float32_mul float32_mul_arm
|
|
|
|
#define float32_muladd float32_muladd_arm
|
|
|
|
#define float32_rem float32_rem_arm
|
|
|
|
#define float32_round_to_int float32_round_to_int_arm
|
|
|
|
#define float32_scalbn float32_scalbn_arm
|
|
|
|
#define float32_set_sign float32_set_sign_arm
|
2018-05-20 02:33:49 +00:00
|
|
|
#define float32_silence_nan float32_silence_nan_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define float32_sqrt float32_sqrt_arm
|
|
|
|
#define float32_squash_input_denormal float32_squash_input_denormal_arm
|
|
|
|
#define float32_sub float32_sub_arm
|
|
|
|
#define float32_to_float128 float32_to_float128_arm
|
|
|
|
#define float32_to_float16 float32_to_float16_arm
|
|
|
|
#define float32_to_float64 float32_to_float64_arm
|
|
|
|
#define float32_to_floatx80 float32_to_floatx80_arm
|
|
|
|
#define float32_to_int16 float32_to_int16_arm
|
|
|
|
#define float32_to_int16_round_to_zero float32_to_int16_round_to_zero_arm
|
2018-08-25 07:56:48 +00:00
|
|
|
#define float32_to_int16_scalbn float32_to_int16_scalbn_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define float32_to_int32 float32_to_int32_arm
|
|
|
|
#define float32_to_int32_round_to_zero float32_to_int32_round_to_zero_arm
|
2018-08-25 07:56:48 +00:00
|
|
|
#define float32_to_int32_scalbn float32_to_int32_scalbn_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define float32_to_int64 float32_to_int64_arm
|
|
|
|
#define float32_to_int64_round_to_zero float32_to_int64_round_to_zero_arm
|
2018-08-25 07:56:48 +00:00
|
|
|
#define float32_to_int64_scalbn float32_to_int64_scalbn_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define float32_to_uint16 float32_to_uint16_arm
|
|
|
|
#define float32_to_uint16_round_to_zero float32_to_uint16_round_to_zero_arm
|
2018-08-25 07:56:48 +00:00
|
|
|
#define float32_to_uint16_scalbn float32_to_uint16_scalbn_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define float32_to_uint32 float32_to_uint32_arm
|
|
|
|
#define float32_to_uint32_round_to_zero float32_to_uint32_round_to_zero_arm
|
2018-08-25 07:56:48 +00:00
|
|
|
#define float32_to_uint32_scalbn float32_to_uint32_scalbn_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define float32_to_uint64 float32_to_uint64_arm
|
|
|
|
#define float32_to_uint64_round_to_zero float32_to_uint64_round_to_zero_arm
|
2018-08-25 07:56:48 +00:00
|
|
|
#define float32_to_uint64_scalbn float32_to_uint64_scalbn_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define float32_unordered float32_unordered_arm
|
|
|
|
#define float32_unordered_quiet float32_unordered_quiet_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define float64ToCommonNaN float64ToCommonNaN_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define float64_abs float64_abs_arm
|
|
|
|
#define float64_add float64_add_arm
|
|
|
|
#define float64_chs float64_chs_arm
|
|
|
|
#define float64_compare float64_compare_arm
|
|
|
|
#define float64_compare_internal float64_compare_internal_arm
|
|
|
|
#define float64_compare_quiet float64_compare_quiet_arm
|
|
|
|
#define float64_default_nan float64_default_nan_arm
|
|
|
|
#define float64_div float64_div_arm
|
|
|
|
#define float64_eq float64_eq_arm
|
|
|
|
#define float64_eq_quiet float64_eq_quiet_arm
|
|
|
|
#define float64_is_any_nan float64_is_any_nan_arm
|
|
|
|
#define float64_is_infinity float64_is_infinity_arm
|
|
|
|
#define float64_is_neg float64_is_neg_arm
|
|
|
|
#define float64_is_quiet_nan float64_is_quiet_nan_arm
|
|
|
|
#define float64_is_signaling_nan float64_is_signaling_nan_arm
|
|
|
|
#define float64_is_zero float64_is_zero_arm
|
|
|
|
#define float64_le float64_le_arm
|
|
|
|
#define float64_le_quiet float64_le_quiet_arm
|
|
|
|
#define float64_log2 float64_log2_arm
|
|
|
|
#define float64_lt float64_lt_arm
|
|
|
|
#define float64_lt_quiet float64_lt_quiet_arm
|
|
|
|
#define float64_max float64_max_arm
|
|
|
|
#define float64_maxnum float64_maxnum_arm
|
|
|
|
#define float64_maxnummag float64_maxnummag_arm
|
|
|
|
#define float64_min float64_min_arm
|
|
|
|
#define float64_minmax float64_minmax_arm
|
|
|
|
#define float64_minnum float64_minnum_arm
|
|
|
|
#define float64_minnummag float64_minnummag_arm
|
|
|
|
#define float64_mul float64_mul_arm
|
|
|
|
#define float64_muladd float64_muladd_arm
|
|
|
|
#define float64_rem float64_rem_arm
|
|
|
|
#define float64_round_to_int float64_round_to_int_arm
|
|
|
|
#define float64_scalbn float64_scalbn_arm
|
|
|
|
#define float64_set_sign float64_set_sign_arm
|
2018-05-20 02:33:49 +00:00
|
|
|
#define float64_silence_nan float64_silence_nan_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define float64_sqrt float64_sqrt_arm
|
|
|
|
#define float64_squash_input_denormal float64_squash_input_denormal_arm
|
|
|
|
#define float64_sub float64_sub_arm
|
|
|
|
#define float64_to_float128 float64_to_float128_arm
|
|
|
|
#define float64_to_float16 float64_to_float16_arm
|
|
|
|
#define float64_to_float32 float64_to_float32_arm
|
|
|
|
#define float64_to_floatx80 float64_to_floatx80_arm
|
|
|
|
#define float64_to_int16 float64_to_int16_arm
|
|
|
|
#define float64_to_int16_round_to_zero float64_to_int16_round_to_zero_arm
|
2018-08-25 07:56:48 +00:00
|
|
|
#define float64_to_int16_scalbn float64_to_int16_scalbn_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define float64_to_int32 float64_to_int32_arm
|
|
|
|
#define float64_to_int32_round_to_zero float64_to_int32_round_to_zero_arm
|
2018-08-25 07:56:48 +00:00
|
|
|
#define float64_to_int32_scalbn float64_to_int32_scalbn_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define float64_to_int64 float64_to_int64_arm
|
|
|
|
#define float64_to_int64_round_to_zero float64_to_int64_round_to_zero_arm
|
2018-08-25 07:56:48 +00:00
|
|
|
#define float64_to_int64_scalbn float64_to_int64_scalbn_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define float64_to_uint16 float64_to_uint16_arm
|
|
|
|
#define float64_to_uint16_round_to_zero float64_to_uint16_round_to_zero_arm
|
2018-08-25 07:56:48 +00:00
|
|
|
#define float64_to_uint16_scalbn float64_to_uint16_scalbn_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define float64_to_uint32 float64_to_uint32_arm
|
|
|
|
#define float64_to_uint32_round_to_zero float64_to_uint32_round_to_zero_arm
|
2018-08-25 07:56:48 +00:00
|
|
|
#define float64_to_uint32_scalbn float64_to_uint32_scalbn_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define float64_to_uint64 float64_to_uint64_arm
|
|
|
|
#define float64_to_uint64_round_to_zero float64_to_uint64_round_to_zero_arm
|
2018-08-25 07:56:48 +00:00
|
|
|
#define float64_to_uint64_scalbn float64_to_uint64_scalbn_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define float64_unordered float64_unordered_arm
|
|
|
|
#define float64_unordered_quiet float64_unordered_quiet_arm
|
|
|
|
#define float_raise float_raise_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define floatx80ToCommonNaN floatx80ToCommonNaN_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define floatx80_add floatx80_add_arm
|
|
|
|
#define floatx80_compare floatx80_compare_arm
|
|
|
|
#define floatx80_compare_internal floatx80_compare_internal_arm
|
|
|
|
#define floatx80_compare_quiet floatx80_compare_quiet_arm
|
|
|
|
#define floatx80_default_nan floatx80_default_nan_arm
|
|
|
|
#define floatx80_div floatx80_div_arm
|
|
|
|
#define floatx80_eq floatx80_eq_arm
|
|
|
|
#define floatx80_eq_quiet floatx80_eq_quiet_arm
|
2018-03-09 06:33:15 +00:00
|
|
|
#define floatx80_infinity floatx80_infinity_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define floatx80_is_quiet_nan floatx80_is_quiet_nan_arm
|
|
|
|
#define floatx80_is_signaling_nan floatx80_is_signaling_nan_arm
|
|
|
|
#define floatx80_le floatx80_le_arm
|
|
|
|
#define floatx80_le_quiet floatx80_le_quiet_arm
|
|
|
|
#define floatx80_lt floatx80_lt_arm
|
|
|
|
#define floatx80_lt_quiet floatx80_lt_quiet_arm
|
|
|
|
#define floatx80_mul floatx80_mul_arm
|
|
|
|
#define floatx80_rem floatx80_rem_arm
|
2018-03-04 02:14:02 +00:00
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#define floatx80_round floatx80_round_arm
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2015-08-21 07:04:50 +00:00
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#define floatx80_round_to_int floatx80_round_to_int_arm
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#define floatx80_scalbn floatx80_scalbn_arm
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2018-05-20 02:33:49 +00:00
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#define floatx80_silence_nan floatx80_silence_nan_arm
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2015-08-21 07:04:50 +00:00
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#define floatx80_sqrt floatx80_sqrt_arm
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#define floatx80_sub floatx80_sub_arm
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#define floatx80_to_float128 floatx80_to_float128_arm
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#define floatx80_to_float32 floatx80_to_float32_arm
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#define floatx80_to_float64 floatx80_to_float64_arm
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#define floatx80_to_int32 floatx80_to_int32_arm
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#define floatx80_to_int32_round_to_zero floatx80_to_int32_round_to_zero_arm
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#define floatx80_to_int64 floatx80_to_int64_arm
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#define floatx80_to_int64_round_to_zero floatx80_to_int64_round_to_zero_arm
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#define floatx80_unordered floatx80_unordered_arm
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#define floatx80_unordered_quiet floatx80_unordered_quiet_arm
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#define flush_icache_range flush_icache_range_arm
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#define format_string format_string_arm
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#define fp_decode_rm fp_decode_rm_arm
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#define frame_dummy frame_dummy_arm
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2018-02-26 00:07:14 +00:00
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#define free_code_gen_buffer free_code_gen_buffer_arm
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2015-08-21 07:04:50 +00:00
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#define free_range free_range_arm
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#define fstat64 fstat64_arm
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#define futex_wait futex_wait_arm
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#define futex_wake futex_wake_arm
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2018-02-26 00:07:14 +00:00
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#define g_list_insert_sorted_merged g_list_insert_sorted_merged_arm
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2015-08-21 07:04:50 +00:00
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#define gen_goto_tb gen_goto_tb_arm
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#define gen_helper_access_check_cp_reg gen_helper_access_check_cp_reg_arm
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2018-02-16 19:54:32 +00:00
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#define gen_helper_check_breakpoints gen_helper_check_breakpoints_arm
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2015-08-21 07:04:50 +00:00
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#define gen_helper_clear_pstate_ss gen_helper_clear_pstate_ss_arm
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#define gen_helper_cpsr_read gen_helper_cpsr_read_arm
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#define gen_helper_cpsr_write gen_helper_cpsr_write_arm
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2018-02-21 03:06:30 +00:00
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#define gen_helper_cpsr_write_eret gen_helper_cpsr_write_eret_arm
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2015-08-21 07:04:50 +00:00
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#define gen_helper_get_cp_reg gen_helper_get_cp_reg_arm
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#define gen_helper_get_cp_reg64 gen_helper_get_cp_reg64_arm
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#define gen_helper_get_r13_banked gen_helper_get_r13_banked_arm
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#define gen_helper_get_user_reg gen_helper_get_user_reg_arm
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#define gen_helper_sel_flags gen_helper_sel_flags_arm
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#define gen_helper_set_cp_reg gen_helper_set_cp_reg_arm
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#define gen_helper_set_cp_reg64 gen_helper_set_cp_reg64_arm
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#define gen_helper_set_neon_rmode gen_helper_set_neon_rmode_arm
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#define gen_helper_set_r13_banked gen_helper_set_r13_banked_arm
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#define gen_helper_set_rmode gen_helper_set_rmode_arm
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#define gen_helper_set_user_reg gen_helper_set_user_reg_arm
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#define gen_helper_vfp_get_fpscr gen_helper_vfp_get_fpscr_arm
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#define gen_helper_vfp_set_fpscr gen_helper_vfp_set_fpscr_arm
|
2018-02-16 14:59:58 +00:00
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#define gen_intermediate_code gen_intermediate_code_arm
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2015-08-21 07:04:50 +00:00
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#define gen_lookup_tb gen_lookup_tb_arm
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#define gen_new_label gen_new_label_arm
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#define gen_set_label gen_set_label_arm
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#define gen_step_complete_exception gen_step_complete_exception_arm
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2018-02-26 00:07:14 +00:00
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#define generate_memory_topology generate_memory_topology_arm
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#define generic_timer_cp_reginfo generic_timer_cp_reginfo_arm
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2015-08-21 07:04:50 +00:00
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#define get_arm_cp_reginfo get_arm_cp_reginfo_arm
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#define get_clock get_clock_arm
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#define get_clock_realtime get_clock_realtime_arm
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#define get_constraint_priority get_constraint_priority_arm
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#define get_float_exception_flags get_float_exception_flags_arm
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#define get_float_rounding_mode get_float_rounding_mode_arm
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#define get_fpstatus_ptr get_fpstatus_ptr_arm
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#define get_level1_table_address get_level1_table_address_arm
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#define get_mem_index get_mem_index_arm
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#define get_next_param_value get_next_param_value_arm
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#define get_opt_name get_opt_name_arm
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#define get_opt_value get_opt_value_arm
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#define get_page_addr_code get_page_addr_code_arm
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#define get_param_value get_param_value_arm
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#define get_phys_addr get_phys_addr_arm
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#define get_phys_addr_lpae get_phys_addr_lpae_arm
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#define get_phys_addr_mpu get_phys_addr_mpu_arm
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#define get_phys_addr_v5 get_phys_addr_v5_arm
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#define get_phys_addr_v6 get_phys_addr_v6_arm
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#define get_system_memory get_system_memory_arm
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#define gt_cnt_read gt_cnt_read_arm
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#define gt_cnt_reset gt_cnt_reset_arm
|
2018-02-26 00:07:14 +00:00
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#define gt_cntfrq_access gt_cntfrq_access_arm
|
2015-08-21 07:04:50 +00:00
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#define gt_counter_access gt_counter_access_arm
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#define gt_ctl_write gt_ctl_write_arm
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#define gt_cval_write gt_cval_write_arm
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#define gt_get_countervalue gt_get_countervalue_arm
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#define gt_pct_access gt_pct_access_arm
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#define gt_ptimer_access gt_ptimer_access_arm
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#define gt_recalc_timer gt_recalc_timer_arm
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#define gt_timer_access gt_timer_access_arm
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#define gt_tval_read gt_tval_read_arm
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#define gt_tval_write gt_tval_write_arm
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#define gt_vct_access gt_vct_access_arm
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#define gt_vtimer_access gt_vtimer_access_arm
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#define guest_phys_blocks_free guest_phys_blocks_free_arm
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#define guest_phys_blocks_init guest_phys_blocks_init_arm
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#define handle_vcvt handle_vcvt_arm
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#define handle_vminmaxnm handle_vminmaxnm_arm
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#define handle_vrint handle_vrint_arm
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#define handle_vsel handle_vsel_arm
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#define has_help_option has_help_option_arm
|
2018-03-06 21:20:28 +00:00
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#define have_avx1 have_avx1_arm
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#define have_avx2 have_avx2_arm
|
2015-08-21 07:04:50 +00:00
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#define have_bmi1 have_bmi1_arm
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#define have_bmi2 have_bmi2_arm
|
2018-03-01 23:48:44 +00:00
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#define have_popcnt have_popcnt_arm
|
2015-08-21 07:04:50 +00:00
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#define hcr_write hcr_write_arm
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#define helper_access_check_cp_reg helper_access_check_cp_reg_arm
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#define helper_add_saturate helper_add_saturate_arm
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#define helper_add_setq helper_add_setq_arm
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#define helper_add_usaturate helper_add_usaturate_arm
|
2018-02-27 17:47:33 +00:00
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#define helper_atomic_add_fetchb helper_atomic_add_fetchb_arm
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#define helper_atomic_add_fetchb_mmu helper_atomic_add_fetchb_mmu_arm
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#define helper_atomic_add_fetchl_be helper_atomic_add_fetchl_be_arm
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#define helper_atomic_add_fetchl_be_mmu helper_atomic_add_fetchl_be_mmu_arm
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#define helper_atomic_add_fetchl_le helper_atomic_add_fetchl_le_arm
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#define helper_atomic_add_fetchl_le_mmu helper_atomic_add_fetchl_le_mmu_arm
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#define helper_atomic_add_fetchq_be helper_atomic_add_fetchq_be_arm
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#define helper_atomic_add_fetchq_be_mmu helper_atomic_add_fetchq_be_mmu_arm
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#define helper_atomic_add_fetchq_le helper_atomic_add_fetchq_le_arm
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#define helper_atomic_add_fetchq_le_mmu helper_atomic_add_fetchq_le_mmu_arm
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#define helper_atomic_add_fetchw_be helper_atomic_add_fetchw_be_arm
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#define helper_atomic_add_fetchw_be_mmu helper_atomic_add_fetchw_be_mmu_arm
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#define helper_atomic_add_fetchw_le helper_atomic_add_fetchw_le_arm
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#define helper_atomic_add_fetchw_le_mmu helper_atomic_add_fetchw_le_mmu_arm
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#define helper_atomic_and_fetchb helper_atomic_and_fetchb_arm
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#define helper_atomic_and_fetchb_le_mmu helper_atomic_and_fetchb_le_mmu_arm
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#define helper_atomic_and_fetchb_mmu helper_atomic_and_fetchb_mmu_arm
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#define helper_atomic_and_fetchl_be helper_atomic_and_fetchl_be_arm
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#define helper_atomic_and_fetchl_be_mmu helper_atomic_and_fetchl_be_mmu_arm
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#define helper_atomic_and_fetchl_le helper_atomic_and_fetchl_le_arm
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#define helper_atomic_and_fetchl_le_mmu helper_atomic_and_fetchl_le_mmu_arm
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#define helper_atomic_and_fetchq_be helper_atomic_and_fetchq_be_arm
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#define helper_atomic_and_fetchq_be_mmu helper_atomic_and_fetchq_be_mmu_arm
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#define helper_atomic_and_fetchq_le helper_atomic_and_fetchq_le_arm
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#define helper_atomic_and_fetchq_le_mmu helper_atomic_and_fetchq_le_mmu_arm
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#define helper_atomic_and_fetchw_be helper_atomic_and_fetchw_be_arm
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#define helper_atomic_and_fetchw_be_mmu helper_atomic_and_fetchw_be_mmu_arm
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#define helper_atomic_and_fetchw_le helper_atomic_and_fetchw_le_arm
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#define helper_atomic_and_fetchw_le_mmu helper_atomic_and_fetchw_le_mmu_arm
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#define helper_atomic_cmpxchgb helper_atomic_cmpxchgb_arm
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#define helper_atomic_cmpxchgb helper_atomic_cmpxchgb_arm
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#define helper_atomic_cmpxchgb_mmu helper_atomic_cmpxchgb_mmu_arm
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#define helper_atomic_cmpxchgl_be helper_atomic_cmpxchgl_be_arm
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#define helper_atomic_cmpxchgl_be_mmu helper_atomic_cmpxchgl_be_mmu_arm
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#define helper_atomic_cmpxchgl_le helper_atomic_cmpxchgl_le_arm
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#define helper_atomic_cmpxchgl_le_mmu helper_atomic_cmpxchgl_le_mmu_arm
|
2018-02-28 02:20:25 +00:00
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#define helper_atomic_cmpxchgo_be helper_atomic_cmpxchgo_be_arm
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#define helper_atomic_cmpxchgo_be_mmu helper_atomic_cmpxchgo_be_mmu_arm
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#define helper_atomic_cmpxchgo_le helper_atomic_cmpxchgo_le_arm
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#define helper_atomic_cmpxchgo_le_mmu helper_atomic_cmpxchgo_le_mmu_arm
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2018-02-27 17:47:33 +00:00
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#define helper_atomic_cmpxchgq_be helper_atomic_cmpxchgq_be_arm
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#define helper_atomic_cmpxchgq_be_mmu helper_atomic_cmpxchgq_be_mmu_arm
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#define helper_atomic_cmpxchgq_le helper_atomic_cmpxchgq_le_arm
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#define helper_atomic_cmpxchgq_le_mmu helper_atomic_cmpxchgq_le_mmu_arm
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#define helper_atomic_cmpxchgw_be helper_atomic_cmpxchgw_be_arm
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#define helper_atomic_cmpxchgw_be_mmu helper_atomic_cmpxchgw_be_mmu_arm
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#define helper_atomic_cmpxchgw_le helper_atomic_cmpxchgw_le_arm
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#define helper_atomic_cmpxchgw_le_mmu helper_atomic_cmpxchgw_le_mmu_arm
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#define helper_atomic_fetch_addb helper_atomic_fetch_addb_arm
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#define helper_atomic_fetch_addb_mmu helper_atomic_fetch_addb_mmu_arm
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#define helper_atomic_fetch_addl_be helper_atomic_fetch_addl_be_arm
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#define helper_atomic_fetch_addl_be_mmu helper_atomic_fetch_addl_be_mmu_arm
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#define helper_atomic_fetch_addl_le helper_atomic_fetch_addl_le_arm
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#define helper_atomic_fetch_addl_le_mmu helper_atomic_fetch_addl_le_mmu_arm
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#define helper_atomic_fetch_addq_be helper_atomic_fetch_addq_be_arm
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#define helper_atomic_fetch_addq_be_mmu helper_atomic_fetch_addq_be_mmu_arm
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#define helper_atomic_fetch_addq_le helper_atomic_fetch_addq_le_arm
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#define helper_atomic_fetch_addq_le_mmu helper_atomic_fetch_addq_le_mmu_arm
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#define helper_atomic_fetch_addw_be helper_atomic_fetch_addw_be_arm
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#define helper_atomic_fetch_addw_be_mmu helper_atomic_fetch_addw_be_mmu_arm
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#define helper_atomic_fetch_addw_le helper_atomic_fetch_addw_le_arm
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#define helper_atomic_fetch_addw_le_mmu helper_atomic_fetch_addw_le_mmu_arm
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#define helper_atomic_fetch_andb helper_atomic_fetch_andb_arm
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#define helper_atomic_fetch_andb_mmu helper_atomic_fetch_andb_mmu_arm
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#define helper_atomic_fetch_andl_be helper_atomic_fetch_andl_be_arm
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#define helper_atomic_fetch_andl_be_mmu helper_atomic_fetch_andl_be_mmu_arm
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#define helper_atomic_fetch_andl_le helper_atomic_fetch_andl_le_arm
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#define helper_atomic_fetch_andl_le_mmu helper_atomic_fetch_andl_le_mmu_arm
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#define helper_atomic_fetch_andq_be helper_atomic_fetch_andq_be_arm
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#define helper_atomic_fetch_andq_be_mmu helper_atomic_fetch_andq_be_mmu_arm
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#define helper_atomic_fetch_andq_le helper_atomic_fetch_andq_le_arm
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#define helper_atomic_fetch_andq_le_mmu helper_atomic_fetch_andq_le_mmu_arm
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#define helper_atomic_fetch_andw_be helper_atomic_fetch_andw_be_arm
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#define helper_atomic_fetch_andw_be_mmu helper_atomic_fetch_andw_be_mmu_arm
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#define helper_atomic_fetch_andw_le helper_atomic_fetch_andw_le_arm
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#define helper_atomic_fetch_andw_le_mmu helper_atomic_fetch_andw_le_mmu_arm
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#define helper_atomic_fetch_orb helper_atomic_fetch_orb_arm
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#define helper_atomic_fetch_orb_mmu helper_atomic_fetch_orb_mmu_arm
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#define helper_atomic_fetch_orl_be helper_atomic_fetch_orl_be_arm
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#define helper_atomic_fetch_orl_be_mmu helper_atomic_fetch_orl_be_mmu_arm
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#define helper_atomic_fetch_orl_le helper_atomic_fetch_orl_le_arm
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#define helper_atomic_fetch_orl_le_mmu helper_atomic_fetch_orl_le_mmu_arm
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#define helper_atomic_fetch_orq_be helper_atomic_fetch_orq_be_arm
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#define helper_atomic_fetch_orq_be_mmu helper_atomic_fetch_orq_be_mmu_arm
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#define helper_atomic_fetch_orq_le helper_atomic_fetch_orq_le_arm
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#define helper_atomic_fetch_orq_le_mmu helper_atomic_fetch_orq_le_mmu_arm
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#define helper_atomic_fetch_orw_be helper_atomic_fetch_orw_be_arm
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#define helper_atomic_fetch_orw_be_mmu helper_atomic_fetch_orw_be_mmu_arm
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#define helper_atomic_fetch_orw_le helper_atomic_fetch_orw_le_arm
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#define helper_atomic_fetch_orw_le_mmu helper_atomic_fetch_orw_le_mmu_arm
|
2018-05-14 11:37:05 +00:00
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#define helper_atomic_fetch_smaxb_mmu helper_atomic_fetch_smaxb_mmu_arm
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#define helper_atomic_fetch_smaxb helper_atomic_fetch_smaxb_arm
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#define helper_atomic_fetch_smaxl_be_mmu helper_atomic_fetch_smaxl_be_mmu_arm
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#define helper_atomic_fetch_smaxl_be helper_atomic_fetch_smaxl_be_arm
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#define helper_atomic_fetch_smaxq_be_mmu helper_atomic_fetch_smaxq_be_mmu_arm
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#define helper_atomic_fetch_smaxq_be helper_atomic_fetch_smaxq_be_arm
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#define helper_atomic_fetch_smaxw_be_mmu helper_atomic_fetch_smaxw_be_mmu_arm
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#define helper_atomic_fetch_smaxw_be helper_atomic_fetch_smaxw_be_arm
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#define helper_atomic_fetch_sminb_mmu helper_atomic_fetch_sminb_mmu_arm
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#define helper_atomic_fetch_sminb helper_atomic_fetch_sminb_arm
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#define helper_atomic_fetch_sminl_be_mmu helper_atomic_fetch_sminl_be_mmu_arm
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#define helper_atomic_fetch_sminl_be helper_atomic_fetch_sminl_be_arm
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#define helper_atomic_fetch_sminq_be_mmu helper_atomic_fetch_sminq_be_mmu_arm
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#define helper_atomic_fetch_sminq_be helper_atomic_fetch_sminq_be_arm
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#define helper_atomic_fetch_sminw_be_mmu helper_atomic_fetch_sminw_be_mmu_arm
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#define helper_atomic_fetch_sminw_be helper_atomic_fetch_sminw_be_arm
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#define helper_atomic_fetch_umaxb_mmu helper_atomic_fetch_umaxb_mmu_arm
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#define helper_atomic_fetch_umaxb helper_atomic_fetch_umaxb_arm
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#define helper_atomic_fetch_umaxl_be_mmu helper_atomic_fetch_umaxl_be_mmu_arm
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#define helper_atomic_fetch_umaxl_be helper_atomic_fetch_umaxl_be_arm
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#define helper_atomic_fetch_umaxq_be_mmu helper_atomic_fetch_umaxq_be_mmu_arm
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#define helper_atomic_fetch_umaxq_be helper_atomic_fetch_umaxq_be_arm
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#define helper_atomic_fetch_umaxw_be_mmu helper_atomic_fetch_umaxw_be_mmu_arm
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#define helper_atomic_fetch_umaxw_be helper_atomic_fetch_umaxw_be_arm
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#define helper_atomic_fetch_uminb_mmu helper_atomic_fetch_uminb_mmu_arm
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#define helper_atomic_fetch_uminb helper_atomic_fetch_uminb_arm
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#define helper_atomic_fetch_uminl_be_mmu helper_atomic_fetch_uminl_be_mmu_arm
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#define helper_atomic_fetch_uminl_be helper_atomic_fetch_uminl_be_arm
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#define helper_atomic_fetch_uminq_be_mmu helper_atomic_fetch_uminq_be_mmu_arm
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#define helper_atomic_fetch_uminq_be helper_atomic_fetch_uminq_be_arm
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#define helper_atomic_fetch_uminw_be_mmu helper_atomic_fetch_uminw_be_mmu_arm
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#define helper_atomic_fetch_uminw_be helper_atomic_fetch_uminw_be_arm
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#define helper_atomic_fetch_smaxl_le_mmu helper_atomic_fetch_smaxl_le_mmu_arm
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#define helper_atomic_fetch_smaxl_le helper_atomic_fetch_smaxl_le_arm
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#define helper_atomic_fetch_smaxq_le_mmu helper_atomic_fetch_smaxq_le_mmu_arm
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#define helper_atomic_fetch_smaxq_le helper_atomic_fetch_smaxq_le_arm
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#define helper_atomic_fetch_smaxw_le_mmu helper_atomic_fetch_smaxw_le_mmu_arm
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#define helper_atomic_fetch_smaxw_le helper_atomic_fetch_smaxw_le_arm
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#define helper_atomic_fetch_sminl_le_mmu helper_atomic_fetch_sminl_le_mmu_arm
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#define helper_atomic_fetch_sminl_le helper_atomic_fetch_sminl_le_arm
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#define helper_atomic_fetch_sminq_le_mmu helper_atomic_fetch_sminq_le_mmu_arm
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#define helper_atomic_fetch_sminq_le helper_atomic_fetch_sminq_le_arm
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#define helper_atomic_fetch_sminw_le_mmu helper_atomic_fetch_sminw_le_mmu_arm
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#define helper_atomic_fetch_sminw_le helper_atomic_fetch_sminw_le_arm
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#define helper_atomic_fetch_umaxl_le_mmu helper_atomic_fetch_umaxl_le_mmu_arm
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#define helper_atomic_fetch_umaxl_le helper_atomic_fetch_umaxl_le_arm
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#define helper_atomic_fetch_umaxq_le_mmu helper_atomic_fetch_umaxq_le_mmu_arm
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#define helper_atomic_fetch_umaxq_le helper_atomic_fetch_umaxq_le_arm
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#define helper_atomic_fetch_umaxw_le_mmu helper_atomic_fetch_umaxw_le_mmu_arm
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#define helper_atomic_fetch_umaxw_le helper_atomic_fetch_umaxw_le_arm
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#define helper_atomic_fetch_uminl_le_mmu helper_atomic_fetch_uminl_le_mmu_arm
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#define helper_atomic_fetch_uminl_le helper_atomic_fetch_uminl_le_arm
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#define helper_atomic_fetch_uminq_le_mmu helper_atomic_fetch_uminq_le_mmu_arm
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#define helper_atomic_fetch_uminq_le helper_atomic_fetch_uminq_le_arm
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#define helper_atomic_fetch_uminw_le_mmu helper_atomic_fetch_uminw_le_mmu_arm
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#define helper_atomic_fetch_uminw_le helper_atomic_fetch_uminw_le_arm
|
2018-02-27 17:47:33 +00:00
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#define helper_atomic_fetch_xorb helper_atomic_fetch_xorb_arm
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#define helper_atomic_fetch_xorb_mmu helper_atomic_fetch_xorb_mmu_arm
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#define helper_atomic_fetch_xorl_be helper_atomic_fetch_xorl_be_arm
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#define helper_atomic_fetch_xorl_be_mmu helper_atomic_fetch_xorl_be_mmu_arm
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#define helper_atomic_fetch_xorl_le helper_atomic_fetch_xorl_le_arm
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#define helper_atomic_fetch_xorl_le_mmu helper_atomic_fetch_xorl_le_mmu_arm
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#define helper_atomic_fetch_xorq_be helper_atomic_fetch_xorq_be_arm
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#define helper_atomic_fetch_xorq_be_mmu helper_atomic_fetch_xorq_be_mmu_arm
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#define helper_atomic_fetch_xorq_le helper_atomic_fetch_xorq_le_arm
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#define helper_atomic_fetch_xorq_le_mmu helper_atomic_fetch_xorq_le_mmu_arm
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#define helper_atomic_fetch_xorw_be helper_atomic_fetch_xorw_be_arm
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#define helper_atomic_fetch_xorw_be_mmu helper_atomic_fetch_xorw_be_mmu_arm
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#define helper_atomic_fetch_xorw_le helper_atomic_fetch_xorw_le_arm
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#define helper_atomic_fetch_xorw_le_mmu helper_atomic_fetch_xorw_le_mmu_arm
|
2018-02-28 02:20:25 +00:00
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#define helper_atomic_ldo_be helper_atomic_ldo_be_arm
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#define helper_atomic_ldo_be_mmu helper_atomic_ldo_be_mmu_arm
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#define helper_atomic_ldo_le helper_atomic_ldo_le_arm
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#define helper_atomic_ldo_le_mmu helper_atomic_ldo_le_mmu_arm
|
2018-02-27 17:47:33 +00:00
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#define helper_atomic_or_fetchb helper_atomic_or_fetchb_arm
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#define helper_atomic_or_fetchb_mmu helper_atomic_or_fetchb_mmu_arm
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#define helper_atomic_or_fetchl_be helper_atomic_or_fetchl_be_arm
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#define helper_atomic_or_fetchl_be_mmu helper_atomic_or_fetchl_be_mmu_arm
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#define helper_atomic_or_fetchl_le helper_atomic_or_fetchl_le_arm
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#define helper_atomic_or_fetchl_le_mmu helper_atomic_or_fetchl_le_mmu_arm
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#define helper_atomic_or_fetchq_be helper_atomic_or_fetchq_be_arm
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#define helper_atomic_or_fetchq_be_mmu helper_atomic_or_fetchq_be_mmu_arm
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#define helper_atomic_or_fetchq_le helper_atomic_or_fetchq_le_arm
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#define helper_atomic_or_fetchq_le_mmu helper_atomic_or_fetchq_le_mmu_arm
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#define helper_atomic_or_fetchw_be helper_atomic_or_fetchw_be_arm
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#define helper_atomic_or_fetchw_be_mmu helper_atomic_or_fetchw_be_mmu_arm
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#define helper_atomic_or_fetchw_le helper_atomic_or_fetchw_le_arm
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#define helper_atomic_or_fetchw_le_mmu helper_atomic_or_fetchw_le_mmu_arm
|
2018-05-14 11:37:05 +00:00
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|
#define helper_atomic_smax_fetchb_mmu helper_atomic_smax_fetchb_mmu_arm
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#define helper_atomic_smax_fetchb helper_atomic_smax_fetchb_arm
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#define helper_atomic_smax_fetchl_be_mmu helper_atomic_smax_fetchl_be_mmu_arm
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#define helper_atomic_smax_fetchl_be helper_atomic_smax_fetchl_be_arm
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#define helper_atomic_smax_fetchq_be_mmu helper_atomic_smax_fetchq_be_mmu_arm
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#define helper_atomic_smax_fetchq_be helper_atomic_smax_fetchq_be_arm
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#define helper_atomic_smax_fetchw_be_mmu helper_atomic_smax_fetchw_be_mmu_arm
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#define helper_atomic_smax_fetchw_be helper_atomic_smax_fetchw_be_arm
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#define helper_atomic_smin_fetchb_mmu helper_atomic_smin_fetchb_mmu_arm
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#define helper_atomic_smin_fetchb helper_atomic_smin_fetchb_arm
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#define helper_atomic_smin_fetchl_be_mmu helper_atomic_smin_fetchl_be_mmu_arm
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#define helper_atomic_smin_fetchl_be helper_atomic_smin_fetchl_be_arm
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#define helper_atomic_smin_fetchq_be_mmu helper_atomic_smin_fetchq_be_mmu_arm
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#define helper_atomic_smin_fetchq_be helper_atomic_smin_fetchq_be_arm
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#define helper_atomic_smin_fetchw_be_mmu helper_atomic_smin_fetchw_be_mmu_arm
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#define helper_atomic_smin_fetchw_be helper_atomic_smin_fetchw_be_arm
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#define helper_atomic_smax_fetchl_le_mmu helper_atomic_smax_fetchl_le_mmu_arm
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#define helper_atomic_smax_fetchl_le helper_atomic_smax_fetchl_le_arm
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#define helper_atomic_smax_fetchq_le_mmu helper_atomic_smax_fetchq_le_mmu_arm
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#define helper_atomic_smax_fetchq_le helper_atomic_smax_fetchq_le_arm
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#define helper_atomic_smax_fetchw_le_mmu helper_atomic_smax_fetchw_le_mmu_arm
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#define helper_atomic_smax_fetchw_le helper_atomic_smax_fetchw_le_arm
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#define helper_atomic_smin_fetchl_le_mmu helper_atomic_smin_fetchl_le_mmu_arm
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#define helper_atomic_smin_fetchl_le helper_atomic_smin_fetchl_le_arm
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#define helper_atomic_smin_fetchq_le_mmu helper_atomic_smin_fetchq_le_mmu_arm
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#define helper_atomic_smin_fetchq_le helper_atomic_smin_fetchq_le_arm
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#define helper_atomic_smin_fetchw_le_mmu helper_atomic_smin_fetchw_le_mmu_arm
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#define helper_atomic_smin_fetchw_le helper_atomic_smin_fetchw_le_arm
|
2018-02-28 02:20:25 +00:00
|
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|
#define helper_atomic_sto_be helper_atomic_sto_be_arm
|
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#define helper_atomic_sto_be_mmu helper_atomic_sto_be_mmu_arm
|
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#define helper_atomic_sto_le helper_atomic_sto_le_arm
|
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|
#define helper_atomic_sto_le_mmu helper_atomic_sto_le_mmu_arm
|
2018-05-14 11:37:05 +00:00
|
|
|
#define helper_atomic_umax_fetchb_mmu helper_atomic_umax_fetchb_mmu_arm
|
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#define helper_atomic_umax_fetchb helper_atomic_umax_fetchb_arm
|
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#define helper_atomic_umax_fetchl_be_mmu helper_atomic_umax_fetchl_be_mmu_arm
|
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|
|
#define helper_atomic_umax_fetchl_be helper_atomic_umax_fetchl_be_arm
|
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#define helper_atomic_umax_fetchq_be_mmu helper_atomic_umax_fetchq_be_mmu_arm
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#define helper_atomic_umax_fetchq_be helper_atomic_umax_fetchq_be_arm
|
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#define helper_atomic_umax_fetchw_be_mmu helper_atomic_umax_fetchw_be_mmu_arm
|
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#define helper_atomic_umax_fetchw_be helper_atomic_umax_fetchw_be_arm
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#define helper_atomic_umin_fetchb_mmu helper_atomic_umin_fetchb_mmu_arm
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#define helper_atomic_umin_fetchb helper_atomic_umin_fetchb_arm
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#define helper_atomic_umin_fetchl_be_mmu helper_atomic_umin_fetchl_be_mmu_arm
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#define helper_atomic_umin_fetchl_be helper_atomic_umin_fetchl_be_arm
|
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#define helper_atomic_umin_fetchq_be_mmu helper_atomic_umin_fetchq_be_mmu_arm
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#define helper_atomic_umin_fetchq_be helper_atomic_umin_fetchq_be_arm
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#define helper_atomic_umin_fetchw_be_mmu helper_atomic_umin_fetchw_be_mmu_arm
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#define helper_atomic_umin_fetchw_be helper_atomic_umin_fetchw_be_arm
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#define helper_atomic_umax_fetchl_le_mmu helper_atomic_umax_fetchl_le_mmu_arm
|
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#define helper_atomic_umax_fetchl_le helper_atomic_umax_fetchl_le_arm
|
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#define helper_atomic_umax_fetchq_le_mmu helper_atomic_umax_fetchq_le_mmu_arm
|
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#define helper_atomic_umax_fetchq_le helper_atomic_umax_fetchq_le_arm
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#define helper_atomic_umax_fetchw_le_mmu helper_atomic_umax_fetchw_le_mmu_arm
|
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#define helper_atomic_umax_fetchw_le helper_atomic_umax_fetchw_le_arm
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#define helper_atomic_umin_fetchl_le_mmu helper_atomic_umin_fetchl_le_mmu_arm
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#define helper_atomic_umin_fetchl_le helper_atomic_umin_fetchl_le_arm
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#define helper_atomic_umin_fetchq_le_mmu helper_atomic_umin_fetchq_le_mmu_arm
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#define helper_atomic_umin_fetchq_le helper_atomic_umin_fetchq_le_arm
|
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#define helper_atomic_umin_fetchw_le_mmu helper_atomic_umin_fetchw_le_mmu_arm
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#define helper_atomic_umin_fetchw_le helper_atomic_umin_fetchw_le_arm
|
2018-02-27 17:47:33 +00:00
|
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|
#define helper_atomic_xchgb helper_atomic_xchgb_arm
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#define helper_atomic_xchgb helper_atomic_xchgb_arm
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#define helper_atomic_xchgb_mmu helper_atomic_xchgb_mmu_arm
|
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#define helper_atomic_xchgl_be helper_atomic_xchgl_be_arm
|
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#define helper_atomic_xchgl_be_mmu helper_atomic_xchgl_be_mmu_arm
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#define helper_atomic_xchgl_le helper_atomic_xchgl_le_arm
|
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#define helper_atomic_xchgl_le_mmu helper_atomic_xchgl_le_mmu_arm
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#define helper_atomic_xchgq_be helper_atomic_xchgq_be_arm
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#define helper_atomic_xchgq_be_mmu helper_atomic_xchgq_be_mmu_arm
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#define helper_atomic_xchgq_le helper_atomic_xchgq_le_arm
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#define helper_atomic_xchgq_le_mmu helper_atomic_xchgq_le_mmu_arm
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#define helper_atomic_xchgw_be helper_atomic_xchgw_be_arm
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#define helper_atomic_xchgw_be_mmu helper_atomic_xchgw_be_mmu_arm
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#define helper_atomic_xchgw_le helper_atomic_xchgw_le_arm
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#define helper_atomic_xchgw_le_mmu helper_atomic_xchgw_le_mmu_arm
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#define helper_atomic_xor_fetchb helper_atomic_xor_fetchb_arm
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#define helper_atomic_xor_fetchb_mmu helper_atomic_xor_fetchb_mmu_arm
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#define helper_atomic_xor_fetchl_be helper_atomic_xor_fetchl_be_arm
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#define helper_atomic_xor_fetchl_be_mmu helper_atomic_xor_fetchl_be_mmu_arm
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#define helper_atomic_xor_fetchl_le helper_atomic_xor_fetchl_le_arm
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#define helper_atomic_xor_fetchl_le_mmu helper_atomic_xor_fetchl_le_mmu_arm
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#define helper_atomic_xor_fetchq_be helper_atomic_xor_fetchq_be_arm
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#define helper_atomic_xor_fetchq_be_mmu helper_atomic_xor_fetchq_be_mmu_arm
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#define helper_atomic_xor_fetchq_le helper_atomic_xor_fetchq_le_arm
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#define helper_atomic_xor_fetchq_le_mmu helper_atomic_xor_fetchq_le_mmu_arm
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#define helper_atomic_xor_fetchw_be helper_atomic_xor_fetchw_be_arm
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#define helper_atomic_xor_fetchw_be_mmu helper_atomic_xor_fetchw_be_mmu_arm
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#define helper_atomic_xor_fetchw_le helper_atomic_xor_fetchw_le_arm
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#define helper_atomic_xor_fetchw_le_mmu helper_atomic_xor_fetchw_le_mmu_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_be_ldl_cmmu helper_be_ldl_cmmu_arm
|
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#define helper_be_ldq_cmmu helper_be_ldq_cmmu_arm
|
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#define helper_be_ldq_mmu helper_be_ldq_mmu_arm
|
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#define helper_be_ldsl_mmu helper_be_ldsl_mmu_arm
|
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#define helper_be_ldsw_mmu helper_be_ldsw_mmu_arm
|
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#define helper_be_ldul_mmu helper_be_ldul_mmu_arm
|
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#define helper_be_lduw_mmu helper_be_lduw_mmu_arm
|
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#define helper_be_ldw_cmmu helper_be_ldw_cmmu_arm
|
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#define helper_be_stl_mmu helper_be_stl_mmu_arm
|
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#define helper_be_stq_mmu helper_be_stq_mmu_arm
|
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#define helper_be_stw_mmu helper_be_stw_mmu_arm
|
2020-01-07 23:04:09 +00:00
|
|
|
#define helper_check_hcr_el2_trap helper_check_hcr_el2_trap_arm
|
2018-03-01 23:12:18 +00:00
|
|
|
#define helper_clrsb_i32 helper_clrsb_i32_arm
|
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|
|
#define helper_clrsb_i64 helper_clrsb_i64_arm
|
2018-03-01 20:53:35 +00:00
|
|
|
#define helper_clz_i32 helper_clz_i32_arm
|
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|
#define helper_clz_i64 helper_clz_i64_arm
|
2018-03-01 23:21:05 +00:00
|
|
|
#define helper_ctpop_i32 helper_ctpop_i32_arm
|
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|
|
#define helper_ctpop_i64 helper_ctpop_i64_arm
|
2018-03-01 20:53:35 +00:00
|
|
|
#define helper_ctz_i32 helper_ctz_i32_arm
|
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|
|
#define helper_ctz_i64 helper_ctz_i64_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_cpsr_read helper_cpsr_read_arm
|
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|
|
#define helper_cpsr_write helper_cpsr_write_arm
|
2018-02-21 03:06:30 +00:00
|
|
|
#define helper_cpsr_write_eret helper_cpsr_write_eret_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_crc32_arm helper_crc32_arm_arm
|
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|
|
#define helper_crc32c helper_crc32c_arm
|
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|
|
#define helper_crypto_aese helper_crypto_aese_arm
|
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|
|
#define helper_crypto_aesmc helper_crypto_aesmc_arm
|
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|
|
#define helper_crypto_sha1_3reg helper_crypto_sha1_3reg_arm
|
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|
|
#define helper_crypto_sha1h helper_crypto_sha1h_arm
|
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|
|
#define helper_crypto_sha1su1 helper_crypto_sha1su1_arm
|
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|
|
#define helper_crypto_sha256h helper_crypto_sha256h_arm
|
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|
|
#define helper_crypto_sha256h2 helper_crypto_sha256h2_arm
|
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|
|
#define helper_crypto_sha256su0 helper_crypto_sha256su0_arm
|
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|
|
#define helper_crypto_sha256su1 helper_crypto_sha256su1_arm
|
2018-03-07 13:35:52 +00:00
|
|
|
#define helper_crypto_sha512h helper_crypto_sha512h_arm
|
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|
|
#define helper_crypto_sha512h2 helper_crypto_sha512h2_arm
|
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|
|
#define helper_crypto_sha512su0 helper_crypto_sha512su0_arm
|
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|
|
#define helper_crypto_sha512su1 helper_crypto_sha512su1_arm
|
2018-03-07 13:46:41 +00:00
|
|
|
#define helper_crypto_sm3partw1 helper_crypto_sm3partw1_arm
|
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|
|
#define helper_crypto_sm3partw2 helper_crypto_sm3partw2_arm
|
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|
|
#define helper_crypto_sm3tt helper_crypto_sm3tt_arm
|
2018-03-07 13:56:16 +00:00
|
|
|
#define helper_crypto_sm4e helper_crypto_sm4e_arm
|
|
|
|
#define helper_crypto_sm4ekey helper_crypto_sm4ekey_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_dc_zva helper_dc_zva_arm
|
2018-02-27 17:47:33 +00:00
|
|
|
#define helper_div_i32 helper_div_i32_arm
|
|
|
|
#define helper_div_i64 helper_div_i64_arm
|
|
|
|
#define helper_divu_i32 helper_divu_i32_arm
|
|
|
|
#define helper_divu_i64 helper_divu_i64_arm
|
2018-03-25 20:30:22 +00:00
|
|
|
#define helper_exception_bkpt_insn helper_exception_bkpt_insn_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_exception_internal helper_exception_internal_arm
|
|
|
|
#define helper_exception_return helper_exception_return_arm
|
|
|
|
#define helper_exception_with_syndrome helper_exception_with_syndrome_arm
|
2018-02-28 02:50:04 +00:00
|
|
|
#define helper_exit_atomic helper_exit_atomic_arm
|
2019-02-27 21:35:09 +00:00
|
|
|
#define helper_fcos helper_fcos_arm
|
2019-03-06 04:17:29 +00:00
|
|
|
#define helper_frint32_d helper_frint32_d_arm
|
|
|
|
#define helper_frint32_s helper_frint32_s_arm
|
|
|
|
#define helper_frint64_d helper_frint64_d_arm
|
|
|
|
#define helper_frint64_s helper_frint64_s_arm
|
2019-02-27 21:35:09 +00:00
|
|
|
#define helper_fscale helper_fscale_arm
|
|
|
|
#define helper_fsincos helper_fsincos_arm
|
|
|
|
#define helper_fsin helper_fsin_arm
|
|
|
|
#define helper_fsqrt helper_fsqrt_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_get_cp_reg helper_get_cp_reg_arm
|
|
|
|
#define helper_get_cp_reg64 helper_get_cp_reg64_arm
|
|
|
|
#define helper_get_r13_banked helper_get_r13_banked_arm
|
|
|
|
#define helper_get_user_reg helper_get_user_reg_arm
|
2019-05-16 20:33:39 +00:00
|
|
|
#define helper_gvec_abs8 helper_gvec_abs8_arm
|
|
|
|
#define helper_gvec_abs16 helper_gvec_abs16_arm
|
|
|
|
#define helper_gvec_abs32 helper_gvec_abs32_arm
|
|
|
|
#define helper_gvec_abs64 helper_gvec_abs64_arm
|
2018-03-06 17:19:54 +00:00
|
|
|
#define helper_gvec_add8 helper_gvec_add8_arm
|
|
|
|
#define helper_gvec_add16 helper_gvec_add16_arm
|
|
|
|
#define helper_gvec_add32 helper_gvec_add32_arm
|
|
|
|
#define helper_gvec_add64 helper_gvec_add64_arm
|
2018-03-06 19:54:25 +00:00
|
|
|
#define helper_gvec_adds8 helper_gvec_adds8_arm
|
|
|
|
#define helper_gvec_adds16 helper_gvec_adds16_arm
|
|
|
|
#define helper_gvec_adds32 helper_gvec_adds32_arm
|
|
|
|
#define helper_gvec_adds64 helper_gvec_adds64_arm
|
2018-03-06 17:19:54 +00:00
|
|
|
#define helper_gvec_and helper_gvec_and_arm
|
|
|
|
#define helper_gvec_andc helper_gvec_andc_arm
|
2018-03-06 19:54:25 +00:00
|
|
|
#define helper_gvec_ands helper_gvec_ands_arm
|
2019-05-24 22:14:31 +00:00
|
|
|
#define helper_gvec_bitsel helper_gvec_bitsel_arm
|
2018-03-06 17:19:54 +00:00
|
|
|
#define helper_gvec_dup8 helper_gvec_dup8_arm
|
|
|
|
#define helper_gvec_dup16 helper_gvec_dup16_arm
|
|
|
|
#define helper_gvec_dup32 helper_gvec_dup32_arm
|
|
|
|
#define helper_gvec_dup64 helper_gvec_dup64_arm
|
2018-03-06 19:07:42 +00:00
|
|
|
#define helper_gvec_eq8 helper_gvec_eq8_arm
|
|
|
|
#define helper_gvec_eq16 helper_gvec_eq16_arm
|
|
|
|
#define helper_gvec_eq32 helper_gvec_eq32_arm
|
|
|
|
#define helper_gvec_eq64 helper_gvec_eq64_arm
|
2019-01-29 20:56:03 +00:00
|
|
|
#define helper_gvec_eqv helper_gvec_eqv_arm
|
2018-06-15 18:10:13 +00:00
|
|
|
#define helper_gvec_fadd_d helper_gvec_fadd_d_arm
|
|
|
|
#define helper_gvec_fadd_h helper_gvec_fadd_h_arm
|
|
|
|
#define helper_gvec_fadd_s helper_gvec_fadd_s_arm
|
2018-03-09 05:55:38 +00:00
|
|
|
#define helper_gvec_fcaddh helper_gvec_fcaddh_arm
|
|
|
|
#define helper_gvec_fcadds helper_gvec_fcadds_arm
|
|
|
|
#define helper_gvec_fcaddd helper_gvec_fcaddd_arm
|
2018-03-09 06:01:42 +00:00
|
|
|
#define helper_gvec_fcmlad helper_gvec_fcmlad_arm
|
|
|
|
#define helper_gvec_fcmlah helper_gvec_fcmlah_arm
|
|
|
|
#define helper_gvec_fcmlah_idx helper_gvec_fcmlah_idx_arm
|
|
|
|
#define helper_gvec_fcmlas helper_gvec_fcmlas_arm
|
|
|
|
#define helper_gvec_fcmlas_idx helper_gvec_fcmlas_idx_arm
|
2018-07-03 07:29:22 +00:00
|
|
|
#define helper_gvec_fmla_idx_d helper_gvec_fmla_idx_d_arm
|
|
|
|
#define helper_gvec_fmla_idx_h helper_gvec_fmla_idx_h_arm
|
|
|
|
#define helper_gvec_fmla_idx_s helper_gvec_fmla_idx_s_arm
|
2019-02-28 20:31:35 +00:00
|
|
|
#define helper_gvec_fmlal_a32 helper_gvec_fmlal_a32_arm
|
|
|
|
#define helper_gvec_fmlal_a64 helper_gvec_fmlal_a64_arm
|
|
|
|
#define helper_gvec_fmlal_idx_a32 helper_gvec_fmlal_idx_a32_arm
|
|
|
|
#define helper_gvec_fmlal_idx_a64 helper_gvec_fmlal_idx_a64_arm
|
2018-06-15 18:10:13 +00:00
|
|
|
#define helper_gvec_fmul_d helper_gvec_fmul_d_arm
|
|
|
|
#define helper_gvec_fmul_h helper_gvec_fmul_h_arm
|
|
|
|
#define helper_gvec_fmul_s helper_gvec_fmul_s_arm
|
2018-07-03 07:29:22 +00:00
|
|
|
#define helper_gvec_fmul_idx_d helper_gvec_fmul_idx_d_arm
|
|
|
|
#define helper_gvec_fmul_idx_h helper_gvec_fmul_idx_h_arm
|
|
|
|
#define helper_gvec_fmul_idx_s helper_gvec_fmul_idx_s_arm
|
2018-07-03 07:44:37 +00:00
|
|
|
#define helper_gvec_frecpe_d helper_gvec_frecpe_d_arm
|
|
|
|
#define helper_gvec_frecpe_h helper_gvec_frecpe_h_arm
|
|
|
|
#define helper_gvec_frecpe_s helper_gvec_frecpe_s_arm
|
|
|
|
#define helper_gvec_frsqrte_d helper_gvec_frsqrte_d_arm
|
|
|
|
#define helper_gvec_frsqrte_h helper_gvec_frsqrte_h_arm
|
|
|
|
#define helper_gvec_frsqrte_s helper_gvec_frsqrte_s_arm
|
2018-06-15 18:10:13 +00:00
|
|
|
#define helper_gvec_fsub_d helper_gvec_fsub_d_arm
|
|
|
|
#define helper_gvec_fsub_h helper_gvec_fsub_h_arm
|
|
|
|
#define helper_gvec_fsub_s helper_gvec_fsub_s_arm
|
|
|
|
#define helper_gvec_ftsmul_d helper_gvec_ftsmul_d_arm
|
|
|
|
#define helper_gvec_ftsmul_h helper_gvec_ftsmul_h_arm
|
|
|
|
#define helper_gvec_ftsmul_s helper_gvec_ftsmul_s_arm
|
2018-03-06 19:07:42 +00:00
|
|
|
#define helper_gvec_le8 helper_gvec_le8_arm
|
|
|
|
#define helper_gvec_le16 helper_gvec_le16_arm
|
|
|
|
#define helper_gvec_le32 helper_gvec_le32_arm
|
|
|
|
#define helper_gvec_le64 helper_gvec_le64_arm
|
|
|
|
#define helper_gvec_leu8 helper_gvec_leu8_arm
|
|
|
|
#define helper_gvec_leu16 helper_gvec_leu16_arm
|
|
|
|
#define helper_gvec_leu32 helper_gvec_leu32_arm
|
|
|
|
#define helper_gvec_leu64 helper_gvec_leu64_arm
|
|
|
|
#define helper_gvec_lt8 helper_gvec_lt8_arm
|
|
|
|
#define helper_gvec_lt16 helper_gvec_lt16_arm
|
|
|
|
#define helper_gvec_lt32 helper_gvec_lt32_arm
|
|
|
|
#define helper_gvec_lt64 helper_gvec_lt64_arm
|
|
|
|
#define helper_gvec_ltu8 helper_gvec_ltu8_arm
|
|
|
|
#define helper_gvec_ltu16 helper_gvec_ltu16_arm
|
|
|
|
#define helper_gvec_ltu32 helper_gvec_ltu32_arm
|
|
|
|
#define helper_gvec_ltu64 helper_gvec_ltu64_arm
|
2018-03-06 17:19:54 +00:00
|
|
|
#define helper_gvec_mov helper_gvec_mov_arm
|
2018-03-06 19:36:48 +00:00
|
|
|
#define helper_gvec_mul8 helper_gvec_mul8_arm
|
|
|
|
#define helper_gvec_mul16 helper_gvec_mul16_arm
|
|
|
|
#define helper_gvec_mul32 helper_gvec_mul32_arm
|
|
|
|
#define helper_gvec_mul64 helper_gvec_mul64_arm
|
2018-03-06 19:54:25 +00:00
|
|
|
#define helper_gvec_muls8 helper_gvec_muls8_arm
|
|
|
|
#define helper_gvec_muls16 helper_gvec_muls16_arm
|
|
|
|
#define helper_gvec_muls32 helper_gvec_muls32_arm
|
|
|
|
#define helper_gvec_muls64 helper_gvec_muls64_arm
|
2019-01-29 20:56:03 +00:00
|
|
|
#define helper_gvec_nand helper_gvec_nand_arm
|
2018-03-06 19:07:42 +00:00
|
|
|
#define helper_gvec_ne8 helper_gvec_ne8_arm
|
|
|
|
#define helper_gvec_ne16 helper_gvec_ne16_arm
|
|
|
|
#define helper_gvec_ne32 helper_gvec_ne32_arm
|
|
|
|
#define helper_gvec_ne64 helper_gvec_ne64_arm
|
2018-03-06 17:19:54 +00:00
|
|
|
#define helper_gvec_neg8 helper_gvec_neg8_arm
|
|
|
|
#define helper_gvec_neg16 helper_gvec_neg16_arm
|
|
|
|
#define helper_gvec_neg32 helper_gvec_neg32_arm
|
|
|
|
#define helper_gvec_neg64 helper_gvec_neg64_arm
|
2019-01-29 20:56:03 +00:00
|
|
|
#define helper_gvec_nor helper_gvec_nor_arm
|
2018-03-06 17:19:54 +00:00
|
|
|
#define helper_gvec_not helper_gvec_not_arm
|
|
|
|
#define helper_gvec_or helper_gvec_or_arm
|
|
|
|
#define helper_gvec_orc helper_gvec_orc_arm
|
2018-03-06 19:54:25 +00:00
|
|
|
#define helper_gvec_ors helper_gvec_ors_arm
|
2018-03-09 05:06:19 +00:00
|
|
|
#define helper_gvec_qrdmlah_s16 helper_gvec_qrdmlah_s16_arm
|
|
|
|
#define helper_gvec_qrdmlah_s32 helper_gvec_qrdmlah_s32_arm
|
|
|
|
#define helper_gvec_qrdmlsh_s16 helper_gvec_qrdmlsh_s16_arm
|
|
|
|
#define helper_gvec_qrdmlsh_s32 helper_gvec_qrdmlsh_s32_arm
|
2018-03-06 18:45:25 +00:00
|
|
|
#define helper_gvec_sar8i helper_gvec_sar8i_arm
|
2019-05-16 19:47:43 +00:00
|
|
|
#define helper_gvec_sar8v helper_gvec_sar8v_arm
|
2018-03-06 18:45:25 +00:00
|
|
|
#define helper_gvec_sar16i helper_gvec_sar16i_arm
|
2019-05-16 19:47:43 +00:00
|
|
|
#define helper_gvec_sar16v helper_gvec_sar16v_arm
|
2018-03-06 18:45:25 +00:00
|
|
|
#define helper_gvec_sar32i helper_gvec_sar32i_arm
|
2019-05-16 19:47:43 +00:00
|
|
|
#define helper_gvec_sar32v helper_gvec_sar32v_arm
|
2018-03-06 18:45:25 +00:00
|
|
|
#define helper_gvec_sar64i helper_gvec_sar64i_arm
|
2019-05-16 19:47:43 +00:00
|
|
|
#define helper_gvec_sar64v helper_gvec_sar64v_arm
|
2018-07-03 08:35:23 +00:00
|
|
|
#define helper_gvec_sdot_b helper_gvec_sdot_b_arm
|
|
|
|
#define helper_gvec_sdot_h helper_gvec_sdot_h_arm
|
2018-07-03 08:39:37 +00:00
|
|
|
#define helper_gvec_sdot_idx_b helper_gvec_sdot_idx_b_arm
|
|
|
|
#define helper_gvec_sdot_idx_h helper_gvec_sdot_idx_h_arm
|
2018-03-06 18:45:25 +00:00
|
|
|
#define helper_gvec_shl8i helper_gvec_shl8i_arm
|
2019-05-16 19:47:43 +00:00
|
|
|
#define helper_gvec_shl8v helper_gvec_shl8v_arm
|
2018-03-06 18:45:25 +00:00
|
|
|
#define helper_gvec_shl16i helper_gvec_shl16i_arm
|
2019-05-16 19:47:43 +00:00
|
|
|
#define helper_gvec_shl16v helper_gvec_shl16v_arm
|
2018-03-06 18:45:25 +00:00
|
|
|
#define helper_gvec_shl32i helper_gvec_shl32i_arm
|
2019-05-16 19:47:43 +00:00
|
|
|
#define helper_gvec_shl32v helper_gvec_shl32v_arm
|
2018-03-06 18:45:25 +00:00
|
|
|
#define helper_gvec_shl64i helper_gvec_shl64i_arm
|
2019-05-16 19:47:43 +00:00
|
|
|
#define helper_gvec_shl64v helper_gvec_shl64v_arm
|
2018-03-06 18:45:25 +00:00
|
|
|
#define helper_gvec_shr8i helper_gvec_shr8i_arm
|
2019-05-16 19:47:43 +00:00
|
|
|
#define helper_gvec_shr8v helper_gvec_shr8v_arm
|
2018-03-06 18:45:25 +00:00
|
|
|
#define helper_gvec_shr16i helper_gvec_shr16i_arm
|
2019-05-16 19:47:43 +00:00
|
|
|
#define helper_gvec_shr16v helper_gvec_shr16v_arm
|
2018-03-06 18:45:25 +00:00
|
|
|
#define helper_gvec_shr32i helper_gvec_shr32i_arm
|
2019-05-16 19:47:43 +00:00
|
|
|
#define helper_gvec_shr32v helper_gvec_shr32v_arm
|
2018-03-06 18:45:25 +00:00
|
|
|
#define helper_gvec_shr64i helper_gvec_shr64i_arm
|
2019-05-16 19:47:43 +00:00
|
|
|
#define helper_gvec_shr64v helper_gvec_shr64v_arm
|
2019-01-29 21:23:24 +00:00
|
|
|
#define helper_gvec_smax8 helper_gvec_smax8_arm
|
|
|
|
#define helper_gvec_smax16 helper_gvec_smax16_arm
|
|
|
|
#define helper_gvec_smax32 helper_gvec_smax32_arm
|
|
|
|
#define helper_gvec_smax64 helper_gvec_smax64_arm
|
|
|
|
#define helper_gvec_smin8 helper_gvec_smin8_arm
|
|
|
|
#define helper_gvec_smin16 helper_gvec_smin16_arm
|
|
|
|
#define helper_gvec_smin32 helper_gvec_smin32_arm
|
|
|
|
#define helper_gvec_smin64 helper_gvec_smin64_arm
|
2019-02-15 23:12:47 +00:00
|
|
|
#define helper_gvec_sqadd_b helper_gvec_sqadd_b_arm
|
|
|
|
#define helper_gvec_sqadd_d helper_gvec_sqadd_d_arm
|
|
|
|
#define helper_gvec_sqadd_h helper_gvec_sqadd_h_arm
|
|
|
|
#define helper_gvec_sqadd_s helper_gvec_sqadd_s_arm
|
|
|
|
#define helper_gvec_sqsub_b helper_gvec_sqsub_b_arm
|
|
|
|
#define helper_gvec_sqsub_d helper_gvec_sqsub_d_arm
|
|
|
|
#define helper_gvec_sqsub_h helper_gvec_sqsub_h_arm
|
|
|
|
#define helper_gvec_sqsub_s helper_gvec_sqsub_s_arm
|
2018-03-06 17:19:54 +00:00
|
|
|
#define helper_gvec_sub8 helper_gvec_sub8_arm
|
|
|
|
#define helper_gvec_sub16 helper_gvec_sub16_arm
|
|
|
|
#define helper_gvec_sub32 helper_gvec_sub32_arm
|
|
|
|
#define helper_gvec_sub64 helper_gvec_sub64_arm
|
2018-03-06 19:54:25 +00:00
|
|
|
#define helper_gvec_subs8 helper_gvec_subs8_arm
|
|
|
|
#define helper_gvec_subs16 helper_gvec_subs16_arm
|
|
|
|
#define helper_gvec_subs32 helper_gvec_subs32_arm
|
|
|
|
#define helper_gvec_subs64 helper_gvec_subs64_arm
|
2018-03-06 19:46:05 +00:00
|
|
|
#define helper_gvec_ssadd8 helper_gvec_ssadd8_arm
|
|
|
|
#define helper_gvec_ssadd16 helper_gvec_ssadd16_arm
|
|
|
|
#define helper_gvec_ssadd32 helper_gvec_ssadd32_arm
|
|
|
|
#define helper_gvec_ssadd64 helper_gvec_ssadd64_arm
|
|
|
|
#define helper_gvec_sssub8 helper_gvec_sssub8_arm
|
|
|
|
#define helper_gvec_sssub16 helper_gvec_sssub16_arm
|
|
|
|
#define helper_gvec_sssub32 helper_gvec_sssub32_arm
|
|
|
|
#define helper_gvec_sssub64 helper_gvec_sssub64_arm
|
2018-07-03 08:35:23 +00:00
|
|
|
#define helper_gvec_udot_b helper_gvec_udot_b_arm
|
|
|
|
#define helper_gvec_udot_h helper_gvec_udot_h_arm
|
2018-07-03 08:39:37 +00:00
|
|
|
#define helper_gvec_udot_idx_b helper_gvec_udot_idx_b_arm
|
|
|
|
#define helper_gvec_udot_idx_h helper_gvec_udot_idx_h_arm
|
2019-01-29 21:23:24 +00:00
|
|
|
#define helper_gvec_umax8 helper_gvec_umax8_arm
|
|
|
|
#define helper_gvec_umax16 helper_gvec_umax16_arm
|
|
|
|
#define helper_gvec_umax32 helper_gvec_umax32_arm
|
|
|
|
#define helper_gvec_umax64 helper_gvec_umax64_arm
|
|
|
|
#define helper_gvec_umin8 helper_gvec_umin8_arm
|
|
|
|
#define helper_gvec_umin16 helper_gvec_umin16_arm
|
|
|
|
#define helper_gvec_umin32 helper_gvec_umin32_arm
|
|
|
|
#define helper_gvec_umin64 helper_gvec_umin64_arm
|
2019-02-15 23:12:47 +00:00
|
|
|
#define helper_gvec_uqadd_b helper_gvec_uqadd_b_arm
|
|
|
|
#define helper_gvec_uqadd_d helper_gvec_uqadd_d_arm
|
|
|
|
#define helper_gvec_uqadd_h helper_gvec_uqadd_h_arm
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#define helper_gvec_uqadd_s helper_gvec_uqadd_s_arm
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#define helper_gvec_uqsub_b helper_gvec_uqsub_b_arm
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#define helper_gvec_uqsub_d helper_gvec_uqsub_d_arm
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#define helper_gvec_uqsub_h helper_gvec_uqsub_h_arm
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#define helper_gvec_uqsub_s helper_gvec_uqsub_s_arm
|
2018-03-06 19:46:05 +00:00
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#define helper_gvec_usadd8 helper_gvec_usadd8_arm
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#define helper_gvec_usadd16 helper_gvec_usadd16_arm
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#define helper_gvec_usadd32 helper_gvec_usadd32_arm
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#define helper_gvec_usadd64 helper_gvec_usadd64_arm
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#define helper_gvec_ussub8 helper_gvec_ussub8_arm
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#define helper_gvec_ussub16 helper_gvec_ussub16_arm
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#define helper_gvec_ussub32 helper_gvec_ussub32_arm
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#define helper_gvec_ussub64 helper_gvec_ussub64_arm
|
2018-03-06 17:19:54 +00:00
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#define helper_gvec_xor helper_gvec_xor_arm
|
2018-03-06 19:54:25 +00:00
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#define helper_gvec_xors helper_gvec_xors_arm
|
2015-08-21 07:04:50 +00:00
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#define helper_iwmmxt_addcb helper_iwmmxt_addcb_arm
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#define helper_iwmmxt_addcl helper_iwmmxt_addcl_arm
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#define helper_iwmmxt_addcw helper_iwmmxt_addcw_arm
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#define helper_iwmmxt_addnb helper_iwmmxt_addnb_arm
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#define helper_iwmmxt_addnl helper_iwmmxt_addnl_arm
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#define helper_iwmmxt_addnw helper_iwmmxt_addnw_arm
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#define helper_iwmmxt_addsb helper_iwmmxt_addsb_arm
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#define helper_iwmmxt_addsl helper_iwmmxt_addsl_arm
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#define helper_iwmmxt_addsw helper_iwmmxt_addsw_arm
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#define helper_iwmmxt_addub helper_iwmmxt_addub_arm
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#define helper_iwmmxt_addul helper_iwmmxt_addul_arm
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#define helper_iwmmxt_adduw helper_iwmmxt_adduw_arm
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#define helper_iwmmxt_align helper_iwmmxt_align_arm
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#define helper_iwmmxt_avgb0 helper_iwmmxt_avgb0_arm
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#define helper_iwmmxt_avgb1 helper_iwmmxt_avgb1_arm
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#define helper_iwmmxt_avgw0 helper_iwmmxt_avgw0_arm
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#define helper_iwmmxt_avgw1 helper_iwmmxt_avgw1_arm
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#define helper_iwmmxt_bcstb helper_iwmmxt_bcstb_arm
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#define helper_iwmmxt_bcstl helper_iwmmxt_bcstl_arm
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#define helper_iwmmxt_bcstw helper_iwmmxt_bcstw_arm
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#define helper_iwmmxt_cmpeqb helper_iwmmxt_cmpeqb_arm
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#define helper_iwmmxt_cmpeql helper_iwmmxt_cmpeql_arm
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#define helper_iwmmxt_cmpeqw helper_iwmmxt_cmpeqw_arm
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#define helper_iwmmxt_cmpgtsb helper_iwmmxt_cmpgtsb_arm
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#define helper_iwmmxt_cmpgtsl helper_iwmmxt_cmpgtsl_arm
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#define helper_iwmmxt_cmpgtsw helper_iwmmxt_cmpgtsw_arm
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#define helper_iwmmxt_cmpgtub helper_iwmmxt_cmpgtub_arm
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#define helper_iwmmxt_cmpgtul helper_iwmmxt_cmpgtul_arm
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#define helper_iwmmxt_cmpgtuw helper_iwmmxt_cmpgtuw_arm
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#define helper_iwmmxt_insr helper_iwmmxt_insr_arm
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#define helper_iwmmxt_macsw helper_iwmmxt_macsw_arm
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#define helper_iwmmxt_macuw helper_iwmmxt_macuw_arm
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#define helper_iwmmxt_maddsq helper_iwmmxt_maddsq_arm
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#define helper_iwmmxt_madduq helper_iwmmxt_madduq_arm
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#define helper_iwmmxt_maxsb helper_iwmmxt_maxsb_arm
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#define helper_iwmmxt_maxsl helper_iwmmxt_maxsl_arm
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#define helper_iwmmxt_maxsw helper_iwmmxt_maxsw_arm
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#define helper_iwmmxt_maxub helper_iwmmxt_maxub_arm
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#define helper_iwmmxt_maxul helper_iwmmxt_maxul_arm
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#define helper_iwmmxt_maxuw helper_iwmmxt_maxuw_arm
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#define helper_iwmmxt_minsb helper_iwmmxt_minsb_arm
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#define helper_iwmmxt_minsl helper_iwmmxt_minsl_arm
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#define helper_iwmmxt_minsw helper_iwmmxt_minsw_arm
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#define helper_iwmmxt_minub helper_iwmmxt_minub_arm
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#define helper_iwmmxt_minul helper_iwmmxt_minul_arm
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#define helper_iwmmxt_minuw helper_iwmmxt_minuw_arm
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#define helper_iwmmxt_msbb helper_iwmmxt_msbb_arm
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#define helper_iwmmxt_msbl helper_iwmmxt_msbl_arm
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#define helper_iwmmxt_msbw helper_iwmmxt_msbw_arm
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#define helper_iwmmxt_muladdsl helper_iwmmxt_muladdsl_arm
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#define helper_iwmmxt_muladdsw helper_iwmmxt_muladdsw_arm
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#define helper_iwmmxt_muladdswl helper_iwmmxt_muladdswl_arm
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#define helper_iwmmxt_mulshw helper_iwmmxt_mulshw_arm
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#define helper_iwmmxt_mulslw helper_iwmmxt_mulslw_arm
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#define helper_iwmmxt_muluhw helper_iwmmxt_muluhw_arm
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#define helper_iwmmxt_mululw helper_iwmmxt_mululw_arm
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#define helper_iwmmxt_packsl helper_iwmmxt_packsl_arm
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#define helper_iwmmxt_packsq helper_iwmmxt_packsq_arm
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#define helper_iwmmxt_packsw helper_iwmmxt_packsw_arm
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#define helper_iwmmxt_packul helper_iwmmxt_packul_arm
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#define helper_iwmmxt_packuq helper_iwmmxt_packuq_arm
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#define helper_iwmmxt_packuw helper_iwmmxt_packuw_arm
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#define helper_iwmmxt_rorl helper_iwmmxt_rorl_arm
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#define helper_iwmmxt_rorq helper_iwmmxt_rorq_arm
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#define helper_iwmmxt_rorw helper_iwmmxt_rorw_arm
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#define helper_iwmmxt_sadb helper_iwmmxt_sadb_arm
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#define helper_iwmmxt_sadw helper_iwmmxt_sadw_arm
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#define helper_iwmmxt_setpsr_nz helper_iwmmxt_setpsr_nz_arm
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#define helper_iwmmxt_shufh helper_iwmmxt_shufh_arm
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#define helper_iwmmxt_slll helper_iwmmxt_slll_arm
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#define helper_iwmmxt_sllq helper_iwmmxt_sllq_arm
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#define helper_iwmmxt_sllw helper_iwmmxt_sllw_arm
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#define helper_iwmmxt_sral helper_iwmmxt_sral_arm
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#define helper_iwmmxt_sraq helper_iwmmxt_sraq_arm
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#define helper_iwmmxt_sraw helper_iwmmxt_sraw_arm
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#define helper_iwmmxt_srll helper_iwmmxt_srll_arm
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#define helper_iwmmxt_srlq helper_iwmmxt_srlq_arm
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#define helper_iwmmxt_srlw helper_iwmmxt_srlw_arm
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#define helper_iwmmxt_subnb helper_iwmmxt_subnb_arm
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#define helper_iwmmxt_subnl helper_iwmmxt_subnl_arm
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#define helper_iwmmxt_subnw helper_iwmmxt_subnw_arm
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#define helper_iwmmxt_subsb helper_iwmmxt_subsb_arm
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#define helper_iwmmxt_subsl helper_iwmmxt_subsl_arm
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#define helper_iwmmxt_subsw helper_iwmmxt_subsw_arm
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#define helper_iwmmxt_subub helper_iwmmxt_subub_arm
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#define helper_iwmmxt_subul helper_iwmmxt_subul_arm
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#define helper_iwmmxt_subuw helper_iwmmxt_subuw_arm
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#define helper_iwmmxt_unpackhb helper_iwmmxt_unpackhb_arm
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#define helper_iwmmxt_unpackhl helper_iwmmxt_unpackhl_arm
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#define helper_iwmmxt_unpackhsb helper_iwmmxt_unpackhsb_arm
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#define helper_iwmmxt_unpackhsl helper_iwmmxt_unpackhsl_arm
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#define helper_iwmmxt_unpackhsw helper_iwmmxt_unpackhsw_arm
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#define helper_iwmmxt_unpackhub helper_iwmmxt_unpackhub_arm
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#define helper_iwmmxt_unpackhul helper_iwmmxt_unpackhul_arm
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#define helper_iwmmxt_unpackhuw helper_iwmmxt_unpackhuw_arm
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#define helper_iwmmxt_unpackhw helper_iwmmxt_unpackhw_arm
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#define helper_iwmmxt_unpacklb helper_iwmmxt_unpacklb_arm
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#define helper_iwmmxt_unpackll helper_iwmmxt_unpackll_arm
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#define helper_iwmmxt_unpacklsb helper_iwmmxt_unpacklsb_arm
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#define helper_iwmmxt_unpacklsl helper_iwmmxt_unpacklsl_arm
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#define helper_iwmmxt_unpacklsw helper_iwmmxt_unpacklsw_arm
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#define helper_iwmmxt_unpacklub helper_iwmmxt_unpacklub_arm
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#define helper_iwmmxt_unpacklul helper_iwmmxt_unpacklul_arm
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#define helper_iwmmxt_unpackluw helper_iwmmxt_unpackluw_arm
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#define helper_iwmmxt_unpacklw helper_iwmmxt_unpacklw_arm
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|
#define helper_ldb_cmmu helper_ldb_cmmu_arm
|
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|
|
#define helper_ldb_mmu helper_ldb_mmu_arm
|
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|
|
#define helper_ldl_cmmu helper_ldl_cmmu_arm
|
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|
|
#define helper_ldl_mmu helper_ldl_mmu_arm
|
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|
#define helper_ldq_cmmu helper_ldq_cmmu_arm
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|
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#define helper_ldq_mmu helper_ldq_mmu_arm
|
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|
|
#define helper_ldw_cmmu helper_ldw_cmmu_arm
|
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|
|
#define helper_ldw_mmu helper_ldw_mmu_arm
|
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|
|
#define helper_le_ldl_cmmu helper_le_ldl_cmmu_arm
|
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|
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#define helper_le_ldq_cmmu helper_le_ldq_cmmu_arm
|
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|
|
#define helper_le_ldq_mmu helper_le_ldq_mmu_arm
|
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|
|
#define helper_le_ldsl_mmu helper_le_ldsl_mmu_arm
|
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|
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#define helper_le_ldsw_mmu helper_le_ldsw_mmu_arm
|
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|
|
#define helper_le_ldul_mmu helper_le_ldul_mmu_arm
|
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|
|
#define helper_le_lduw_mmu helper_le_lduw_mmu_arm
|
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|
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#define helper_le_ldw_cmmu helper_le_ldw_cmmu_arm
|
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|
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#define helper_le_stl_mmu helper_le_stl_mmu_arm
|
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|
|
#define helper_le_stq_mmu helper_le_stq_mmu_arm
|
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|
|
#define helper_le_stw_mmu helper_le_stw_mmu_arm
|
2018-03-03 01:56:29 +00:00
|
|
|
#define helper_lookup_tb_ptr helper_lookup_tb_ptr_arm
|
2018-02-27 17:47:33 +00:00
|
|
|
#define helper_mulsh_i32 helper_mulsh_i32_arm
|
|
|
|
#define helper_mulsh_i64 helper_mulsh_i64_arm
|
|
|
|
#define helper_muluh_i32 helper_muluh_i32_arm
|
|
|
|
#define helper_muluh_i64 helper_muluh_i64_arm
|
2018-02-22 02:43:19 +00:00
|
|
|
#define helper_mrs_banked helper_mrs_banked_arm
|
2018-02-13 18:15:32 +00:00
|
|
|
#define helper_msa_ld_b helper_msa_ld_b_arm
|
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|
|
#define helper_msa_ld_d helper_msa_ld_d_arm
|
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|
|
#define helper_msa_ld_h helper_msa_ld_h_arm
|
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|
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#define helper_msa_ld_w helper_msa_ld_w_arm
|
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|
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#define helper_msa_st_b helper_msa_st_b_arm
|
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|
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#define helper_msa_st_d helper_msa_st_d_arm
|
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|
|
#define helper_msa_st_h helper_msa_st_h_arm
|
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|
|
#define helper_msa_st_w helper_msa_st_w_arm
|
2018-02-22 02:43:19 +00:00
|
|
|
#define helper_msr_banked helper_msr_banked_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_neon_abd_f32 helper_neon_abd_f32_arm
|
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|
|
#define helper_neon_abd_s16 helper_neon_abd_s16_arm
|
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|
|
#define helper_neon_abd_s32 helper_neon_abd_s32_arm
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#define helper_neon_abd_s8 helper_neon_abd_s8_arm
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|
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#define helper_neon_abd_u16 helper_neon_abd_u16_arm
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|
|
#define helper_neon_abd_u32 helper_neon_abd_u32_arm
|
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|
|
#define helper_neon_abd_u8 helper_neon_abd_u8_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define helper_neon_abdl_s16 helper_neon_abdl_s16_arm
|
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|
|
#define helper_neon_abdl_s32 helper_neon_abdl_s32_arm
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|
|
#define helper_neon_abdl_s64 helper_neon_abdl_s64_arm
|
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|
|
#define helper_neon_abdl_u16 helper_neon_abdl_u16_arm
|
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|
|
#define helper_neon_abdl_u32 helper_neon_abdl_u32_arm
|
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|
|
#define helper_neon_abdl_u64 helper_neon_abdl_u64_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_neon_acge_f32 helper_neon_acge_f32_arm
|
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|
|
#define helper_neon_acge_f64 helper_neon_acge_f64_arm
|
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|
|
#define helper_neon_acgt_f32 helper_neon_acgt_f32_arm
|
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|
|
#define helper_neon_acgt_f64 helper_neon_acgt_f64_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define helper_neon_add_u16 helper_neon_add_u16_arm
|
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|
|
#define helper_neon_add_u8 helper_neon_add_u8_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_neon_addl_saturate_s32 helper_neon_addl_saturate_s32_arm
|
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|
|
#define helper_neon_addl_saturate_s64 helper_neon_addl_saturate_s64_arm
|
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|
|
#define helper_neon_addl_u16 helper_neon_addl_u16_arm
|
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|
|
#define helper_neon_addl_u32 helper_neon_addl_u32_arm
|
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|
|
#define helper_neon_ceq_f32 helper_neon_ceq_f32_arm
|
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|
|
#define helper_neon_ceq_u16 helper_neon_ceq_u16_arm
|
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|
|
#define helper_neon_ceq_u32 helper_neon_ceq_u32_arm
|
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|
|
#define helper_neon_ceq_u8 helper_neon_ceq_u8_arm
|
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|
|
#define helper_neon_cge_f32 helper_neon_cge_f32_arm
|
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|
|
#define helper_neon_cge_s16 helper_neon_cge_s16_arm
|
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|
|
#define helper_neon_cge_s32 helper_neon_cge_s32_arm
|
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|
|
#define helper_neon_cge_s8 helper_neon_cge_s8_arm
|
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|
|
#define helper_neon_cge_u16 helper_neon_cge_u16_arm
|
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|
|
#define helper_neon_cge_u32 helper_neon_cge_u32_arm
|
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|
|
#define helper_neon_cge_u8 helper_neon_cge_u8_arm
|
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|
|
#define helper_neon_cgt_f32 helper_neon_cgt_f32_arm
|
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|
|
#define helper_neon_cgt_s16 helper_neon_cgt_s16_arm
|
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|
|
#define helper_neon_cgt_s32 helper_neon_cgt_s32_arm
|
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|
|
#define helper_neon_cgt_s8 helper_neon_cgt_s8_arm
|
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|
|
#define helper_neon_cgt_u16 helper_neon_cgt_u16_arm
|
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|
|
#define helper_neon_cgt_u32 helper_neon_cgt_u32_arm
|
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|
|
#define helper_neon_cgt_u8 helper_neon_cgt_u8_arm
|
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|
|
#define helper_neon_cls_s16 helper_neon_cls_s16_arm
|
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|
|
#define helper_neon_cls_s32 helper_neon_cls_s32_arm
|
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|
|
#define helper_neon_cls_s8 helper_neon_cls_s8_arm
|
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|
|
#define helper_neon_clz_u16 helper_neon_clz_u16_arm
|
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|
|
#define helper_neon_clz_u8 helper_neon_clz_u8_arm
|
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|
|
#define helper_neon_cnt_u8 helper_neon_cnt_u8_arm
|
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|
|
#define helper_neon_fcvt_f16_to_f32 helper_neon_fcvt_f16_to_f32_arm
|
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|
|
#define helper_neon_fcvt_f32_to_f16 helper_neon_fcvt_f32_to_f16_arm
|
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|
|
#define helper_neon_hadd_s16 helper_neon_hadd_s16_arm
|
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|
|
#define helper_neon_hadd_s32 helper_neon_hadd_s32_arm
|
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|
|
#define helper_neon_hadd_s8 helper_neon_hadd_s8_arm
|
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|
|
#define helper_neon_hadd_u16 helper_neon_hadd_u16_arm
|
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|
|
#define helper_neon_hadd_u32 helper_neon_hadd_u32_arm
|
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|
|
#define helper_neon_hadd_u8 helper_neon_hadd_u8_arm
|
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|
|
#define helper_neon_hsub_s16 helper_neon_hsub_s16_arm
|
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|
|
#define helper_neon_hsub_s32 helper_neon_hsub_s32_arm
|
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|
|
#define helper_neon_hsub_s8 helper_neon_hsub_s8_arm
|
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|
|
#define helper_neon_hsub_u16 helper_neon_hsub_u16_arm
|
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|
|
#define helper_neon_hsub_u32 helper_neon_hsub_u32_arm
|
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|
|
#define helper_neon_hsub_u8 helper_neon_hsub_u8_arm
|
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|
|
#define helper_neon_max_s16 helper_neon_max_s16_arm
|
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|
|
#define helper_neon_max_s32 helper_neon_max_s32_arm
|
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|
|
#define helper_neon_max_s8 helper_neon_max_s8_arm
|
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|
|
#define helper_neon_max_u16 helper_neon_max_u16_arm
|
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|
|
#define helper_neon_max_u32 helper_neon_max_u32_arm
|
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#define helper_neon_max_u8 helper_neon_max_u8_arm
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#define helper_neon_min_s16 helper_neon_min_s16_arm
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#define helper_neon_min_s32 helper_neon_min_s32_arm
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#define helper_neon_min_s8 helper_neon_min_s8_arm
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#define helper_neon_min_u16 helper_neon_min_u16_arm
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#define helper_neon_min_u32 helper_neon_min_u32_arm
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#define helper_neon_min_u8 helper_neon_min_u8_arm
|
2018-02-26 00:07:14 +00:00
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#define helper_neon_mul_p8 helper_neon_mul_p8_arm
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#define helper_neon_mul_u16 helper_neon_mul_u16_arm
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#define helper_neon_mul_u8 helper_neon_mul_u8_arm
|
2015-08-21 07:04:50 +00:00
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#define helper_neon_mull_p8 helper_neon_mull_p8_arm
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#define helper_neon_mull_s16 helper_neon_mull_s16_arm
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#define helper_neon_mull_s8 helper_neon_mull_s8_arm
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#define helper_neon_mull_u16 helper_neon_mull_u16_arm
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#define helper_neon_mull_u8 helper_neon_mull_u8_arm
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#define helper_neon_narrow_high_u16 helper_neon_narrow_high_u16_arm
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#define helper_neon_narrow_high_u8 helper_neon_narrow_high_u8_arm
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#define helper_neon_narrow_round_high_u16 helper_neon_narrow_round_high_u16_arm
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#define helper_neon_narrow_round_high_u8 helper_neon_narrow_round_high_u8_arm
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#define helper_neon_narrow_sat_s16 helper_neon_narrow_sat_s16_arm
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#define helper_neon_narrow_sat_s32 helper_neon_narrow_sat_s32_arm
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#define helper_neon_narrow_sat_s8 helper_neon_narrow_sat_s8_arm
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#define helper_neon_narrow_sat_u16 helper_neon_narrow_sat_u16_arm
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#define helper_neon_narrow_sat_u32 helper_neon_narrow_sat_u32_arm
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#define helper_neon_narrow_sat_u8 helper_neon_narrow_sat_u8_arm
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#define helper_neon_narrow_u16 helper_neon_narrow_u16_arm
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#define helper_neon_narrow_u8 helper_neon_narrow_u8_arm
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#define helper_neon_negl_u16 helper_neon_negl_u16_arm
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#define helper_neon_negl_u32 helper_neon_negl_u32_arm
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#define helper_neon_padd_u16 helper_neon_padd_u16_arm
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#define helper_neon_padd_u8 helper_neon_padd_u8_arm
|
2018-02-26 00:07:14 +00:00
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#define helper_neon_paddl_u16 helper_neon_paddl_u16_arm
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#define helper_neon_paddl_u32 helper_neon_paddl_u32_arm
|
2015-08-21 07:04:50 +00:00
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#define helper_neon_pmax_s16 helper_neon_pmax_s16_arm
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#define helper_neon_pmax_s8 helper_neon_pmax_s8_arm
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#define helper_neon_pmax_u16 helper_neon_pmax_u16_arm
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#define helper_neon_pmax_u8 helper_neon_pmax_u8_arm
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#define helper_neon_pmin_s16 helper_neon_pmin_s16_arm
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#define helper_neon_pmin_s8 helper_neon_pmin_s8_arm
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#define helper_neon_pmin_u16 helper_neon_pmin_u16_arm
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#define helper_neon_pmin_u8 helper_neon_pmin_u8_arm
|
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#define helper_neon_pmull_64_hi helper_neon_pmull_64_hi_arm
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#define helper_neon_pmull_64_lo helper_neon_pmull_64_lo_arm
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#define helper_neon_qabs_s16 helper_neon_qabs_s16_arm
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#define helper_neon_qabs_s32 helper_neon_qabs_s32_arm
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#define helper_neon_qabs_s64 helper_neon_qabs_s64_arm
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#define helper_neon_qabs_s8 helper_neon_qabs_s8_arm
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#define helper_neon_qadd_s16 helper_neon_qadd_s16_arm
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#define helper_neon_qadd_s32 helper_neon_qadd_s32_arm
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#define helper_neon_qadd_s64 helper_neon_qadd_s64_arm
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#define helper_neon_qadd_s8 helper_neon_qadd_s8_arm
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#define helper_neon_qadd_u16 helper_neon_qadd_u16_arm
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#define helper_neon_qadd_u32 helper_neon_qadd_u32_arm
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#define helper_neon_qadd_u64 helper_neon_qadd_u64_arm
|
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#define helper_neon_qadd_u8 helper_neon_qadd_u8_arm
|
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#define helper_neon_qdmulh_s16 helper_neon_qdmulh_s16_arm
|
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#define helper_neon_qdmulh_s32 helper_neon_qdmulh_s32_arm
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#define helper_neon_qneg_s16 helper_neon_qneg_s16_arm
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#define helper_neon_qneg_s32 helper_neon_qneg_s32_arm
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#define helper_neon_qneg_s64 helper_neon_qneg_s64_arm
|
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|
#define helper_neon_qneg_s8 helper_neon_qneg_s8_arm
|
2018-03-09 04:57:21 +00:00
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|
#define helper_neon_qrdmlah_s16 helper_neon_qrdmlah_s16_arm
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#define helper_neon_qrdmlah_s32 helper_neon_qrdmlah_s32_arm
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#define helper_neon_qrdmlsh_s16 helper_neon_qrdmlsh_s16_arm
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#define helper_neon_qrdmlsh_s32 helper_neon_qrdmlsh_s32_arm
|
2015-08-21 07:04:50 +00:00
|
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|
#define helper_neon_qrdmulh_s16 helper_neon_qrdmulh_s16_arm
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|
#define helper_neon_qrdmulh_s32 helper_neon_qrdmulh_s32_arm
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#define helper_neon_qrshl_s16 helper_neon_qrshl_s16_arm
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#define helper_neon_qrshl_s32 helper_neon_qrshl_s32_arm
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|
#define helper_neon_qrshl_s64 helper_neon_qrshl_s64_arm
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|
#define helper_neon_qrshl_s8 helper_neon_qrshl_s8_arm
|
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|
#define helper_neon_qrshl_u16 helper_neon_qrshl_u16_arm
|
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|
#define helper_neon_qrshl_u32 helper_neon_qrshl_u32_arm
|
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|
|
#define helper_neon_qrshl_u64 helper_neon_qrshl_u64_arm
|
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|
#define helper_neon_qrshl_u8 helper_neon_qrshl_u8_arm
|
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|
#define helper_neon_qshl_s16 helper_neon_qshl_s16_arm
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|
#define helper_neon_qshl_s32 helper_neon_qshl_s32_arm
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|
#define helper_neon_qshl_s64 helper_neon_qshl_s64_arm
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|
#define helper_neon_qshl_s8 helper_neon_qshl_s8_arm
|
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|
#define helper_neon_qshl_u16 helper_neon_qshl_u16_arm
|
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|
#define helper_neon_qshl_u32 helper_neon_qshl_u32_arm
|
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|
|
#define helper_neon_qshl_u64 helper_neon_qshl_u64_arm
|
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|
#define helper_neon_qshl_u8 helper_neon_qshl_u8_arm
|
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|
#define helper_neon_qshlu_s16 helper_neon_qshlu_s16_arm
|
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|
#define helper_neon_qshlu_s32 helper_neon_qshlu_s32_arm
|
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|
#define helper_neon_qshlu_s64 helper_neon_qshlu_s64_arm
|
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|
#define helper_neon_qshlu_s8 helper_neon_qshlu_s8_arm
|
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|
#define helper_neon_qsub_s16 helper_neon_qsub_s16_arm
|
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|
#define helper_neon_qsub_s32 helper_neon_qsub_s32_arm
|
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|
#define helper_neon_qsub_s64 helper_neon_qsub_s64_arm
|
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|
|
#define helper_neon_qsub_s8 helper_neon_qsub_s8_arm
|
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|
|
#define helper_neon_qsub_u16 helper_neon_qsub_u16_arm
|
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|
|
#define helper_neon_qsub_u32 helper_neon_qsub_u32_arm
|
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|
|
#define helper_neon_qsub_u64 helper_neon_qsub_u64_arm
|
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|
|
#define helper_neon_qsub_u8 helper_neon_qsub_u8_arm
|
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|
|
#define helper_neon_qunzip16 helper_neon_qunzip16_arm
|
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|
|
#define helper_neon_qunzip32 helper_neon_qunzip32_arm
|
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|
|
#define helper_neon_qunzip8 helper_neon_qunzip8_arm
|
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|
|
#define helper_neon_qzip16 helper_neon_qzip16_arm
|
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|
|
#define helper_neon_qzip32 helper_neon_qzip32_arm
|
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|
|
#define helper_neon_qzip8 helper_neon_qzip8_arm
|
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|
|
#define helper_neon_rbit_u8 helper_neon_rbit_u8_arm
|
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|
|
#define helper_neon_rhadd_s16 helper_neon_rhadd_s16_arm
|
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|
|
#define helper_neon_rhadd_s32 helper_neon_rhadd_s32_arm
|
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|
|
#define helper_neon_rhadd_s8 helper_neon_rhadd_s8_arm
|
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|
|
#define helper_neon_rhadd_u16 helper_neon_rhadd_u16_arm
|
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|
|
#define helper_neon_rhadd_u32 helper_neon_rhadd_u32_arm
|
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|
|
#define helper_neon_rhadd_u8 helper_neon_rhadd_u8_arm
|
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|
|
#define helper_neon_rshl_s16 helper_neon_rshl_s16_arm
|
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|
|
#define helper_neon_rshl_s32 helper_neon_rshl_s32_arm
|
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|
|
#define helper_neon_rshl_s64 helper_neon_rshl_s64_arm
|
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|
|
#define helper_neon_rshl_s8 helper_neon_rshl_s8_arm
|
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|
|
#define helper_neon_rshl_u16 helper_neon_rshl_u16_arm
|
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|
|
#define helper_neon_rshl_u32 helper_neon_rshl_u32_arm
|
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|
|
#define helper_neon_rshl_u64 helper_neon_rshl_u64_arm
|
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|
|
#define helper_neon_rshl_u8 helper_neon_rshl_u8_arm
|
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|
|
#define helper_neon_shl_s16 helper_neon_shl_s16_arm
|
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|
|
#define helper_neon_shl_s32 helper_neon_shl_s32_arm
|
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|
|
#define helper_neon_shl_s64 helper_neon_shl_s64_arm
|
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|
|
#define helper_neon_shl_s8 helper_neon_shl_s8_arm
|
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|
|
#define helper_neon_shl_u16 helper_neon_shl_u16_arm
|
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|
|
#define helper_neon_shl_u32 helper_neon_shl_u32_arm
|
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|
|
#define helper_neon_shl_u64 helper_neon_shl_u64_arm
|
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|
|
#define helper_neon_shl_u8 helper_neon_shl_u8_arm
|
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|
|
#define helper_neon_sqadd_u16 helper_neon_sqadd_u16_arm
|
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|
|
#define helper_neon_sqadd_u32 helper_neon_sqadd_u32_arm
|
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|
|
#define helper_neon_sqadd_u64 helper_neon_sqadd_u64_arm
|
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|
|
#define helper_neon_sqadd_u8 helper_neon_sqadd_u8_arm
|
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|
|
#define helper_neon_sub_u16 helper_neon_sub_u16_arm
|
|
|
|
#define helper_neon_sub_u8 helper_neon_sub_u8_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define helper_neon_subl_u16 helper_neon_subl_u16_arm
|
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|
|
#define helper_neon_subl_u32 helper_neon_subl_u32_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_neon_tbl helper_neon_tbl_arm
|
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|
|
#define helper_neon_tst_u16 helper_neon_tst_u16_arm
|
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|
|
#define helper_neon_tst_u32 helper_neon_tst_u32_arm
|
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|
|
#define helper_neon_tst_u8 helper_neon_tst_u8_arm
|
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|
|
#define helper_neon_unarrow_sat16 helper_neon_unarrow_sat16_arm
|
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|
|
#define helper_neon_unarrow_sat32 helper_neon_unarrow_sat32_arm
|
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|
|
#define helper_neon_unarrow_sat8 helper_neon_unarrow_sat8_arm
|
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|
|
#define helper_neon_unzip16 helper_neon_unzip16_arm
|
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|
|
#define helper_neon_unzip8 helper_neon_unzip8_arm
|
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|
|
#define helper_neon_uqadd_s16 helper_neon_uqadd_s16_arm
|
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|
|
#define helper_neon_uqadd_s32 helper_neon_uqadd_s32_arm
|
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|
|
#define helper_neon_uqadd_s64 helper_neon_uqadd_s64_arm
|
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|
|
#define helper_neon_uqadd_s8 helper_neon_uqadd_s8_arm
|
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|
|
#define helper_neon_widen_s16 helper_neon_widen_s16_arm
|
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|
|
#define helper_neon_widen_s8 helper_neon_widen_s8_arm
|
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|
|
#define helper_neon_widen_u16 helper_neon_widen_u16_arm
|
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|
|
#define helper_neon_widen_u8 helper_neon_widen_u8_arm
|
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|
|
#define helper_neon_zip16 helper_neon_zip16_arm
|
|
|
|
#define helper_neon_zip8 helper_neon_zip8_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define helper_power_down helper_power_down_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_pre_hvc helper_pre_hvc_arm
|
|
|
|
#define helper_pre_smc helper_pre_smc_arm
|
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|
|
#define helper_qadd16 helper_qadd16_arm
|
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|
|
#define helper_qadd8 helper_qadd8_arm
|
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|
|
#define helper_qaddsubx helper_qaddsubx_arm
|
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|
|
#define helper_qsub16 helper_qsub16_arm
|
|
|
|
#define helper_qsub8 helper_qsub8_arm
|
|
|
|
#define helper_qsubaddx helper_qsubaddx_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define helper_raise_exception helper_raise_exception_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_rbit helper_rbit_arm
|
2018-03-08 23:57:00 +00:00
|
|
|
#define helper_recpe_f16 helper_recpe_f16_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_recpe_f32 helper_recpe_f32_arm
|
|
|
|
#define helper_recpe_f64 helper_recpe_f64_arm
|
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|
|
#define helper_recpe_u32 helper_recpe_u32_arm
|
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|
|
#define helper_recps_f32 helper_recps_f32_arm
|
2018-02-27 17:47:33 +00:00
|
|
|
#define helper_rem_i32 helper_rem_i32_arm
|
|
|
|
#define helper_rem_i64 helper_rem_i64_arm
|
|
|
|
#define helper_remu_i32 helper_remu_i32_arm
|
|
|
|
#define helper_remu_i64 helper_remu_i64_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_ret_ldb_cmmu helper_ret_ldb_cmmu_arm
|
|
|
|
#define helper_ret_ldsb_mmu helper_ret_ldsb_mmu_arm
|
|
|
|
#define helper_ret_ldub_mmu helper_ret_ldub_mmu_arm
|
|
|
|
#define helper_ret_stb_mmu helper_ret_stb_mmu_arm
|
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|
|
#define helper_rintd helper_rintd_arm
|
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|
|
#define helper_rintd_exact helper_rintd_exact_arm
|
|
|
|
#define helper_rints helper_rints_arm
|
|
|
|
#define helper_rints_exact helper_rints_exact_arm
|
|
|
|
#define helper_ror_cc helper_ror_cc_arm
|
2018-03-09 03:04:58 +00:00
|
|
|
#define helper_rsqrte_f16 helper_rsqrte_f16_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_rsqrte_f32 helper_rsqrte_f32_arm
|
|
|
|
#define helper_rsqrte_f64 helper_rsqrte_f64_arm
|
|
|
|
#define helper_rsqrte_u32 helper_rsqrte_u32_arm
|
|
|
|
#define helper_rsqrts_f32 helper_rsqrts_f32_arm
|
|
|
|
#define helper_sadd16 helper_sadd16_arm
|
|
|
|
#define helper_sadd8 helper_sadd8_arm
|
|
|
|
#define helper_saddsubx helper_saddsubx_arm
|
|
|
|
#define helper_sar_cc helper_sar_cc_arm
|
2018-02-27 17:47:33 +00:00
|
|
|
#define helper_sar_i32 helper_sar_i32_arm
|
|
|
|
#define helper_sar_i64 helper_sar_i64_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_sdiv helper_sdiv_arm
|
|
|
|
#define helper_sel_flags helper_sel_flags_arm
|
|
|
|
#define helper_set_cp_reg helper_set_cp_reg_arm
|
|
|
|
#define helper_set_cp_reg64 helper_set_cp_reg64_arm
|
|
|
|
#define helper_set_neon_rmode helper_set_neon_rmode_arm
|
|
|
|
#define helper_set_r13_banked helper_set_r13_banked_arm
|
|
|
|
#define helper_set_rmode helper_set_rmode_arm
|
|
|
|
#define helper_set_user_reg helper_set_user_reg_arm
|
2018-02-21 07:38:42 +00:00
|
|
|
#define helper_setend helper_setend_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_shadd16 helper_shadd16_arm
|
|
|
|
#define helper_shadd8 helper_shadd8_arm
|
|
|
|
#define helper_shaddsubx helper_shaddsubx_arm
|
|
|
|
#define helper_shl_cc helper_shl_cc_arm
|
2018-02-27 17:47:33 +00:00
|
|
|
#define helper_shl_i64 helper_shl_i64_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_shr_cc helper_shr_cc_arm
|
2018-02-27 17:47:33 +00:00
|
|
|
#define helper_shr_i32 helper_shr_i32_arm
|
|
|
|
#define helper_shr_i64 helper_shr_i64_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_shsub16 helper_shsub16_arm
|
|
|
|
#define helper_shsub8 helper_shsub8_arm
|
|
|
|
#define helper_shsubaddx helper_shsubaddx_arm
|
|
|
|
#define helper_ssat helper_ssat_arm
|
|
|
|
#define helper_ssat16 helper_ssat16_arm
|
|
|
|
#define helper_ssub16 helper_ssub16_arm
|
|
|
|
#define helper_ssub8 helper_ssub8_arm
|
|
|
|
#define helper_ssubaddx helper_ssubaddx_arm
|
|
|
|
#define helper_stb_mmu helper_stb_mmu_arm
|
|
|
|
#define helper_stl_mmu helper_stl_mmu_arm
|
|
|
|
#define helper_stq_mmu helper_stq_mmu_arm
|
|
|
|
#define helper_stw_mmu helper_stw_mmu_arm
|
|
|
|
#define helper_sub_saturate helper_sub_saturate_arm
|
|
|
|
#define helper_sub_usaturate helper_sub_usaturate_arm
|
|
|
|
#define helper_sxtb16 helper_sxtb16_arm
|
|
|
|
#define helper_uadd16 helper_uadd16_arm
|
|
|
|
#define helper_uadd8 helper_uadd8_arm
|
|
|
|
#define helper_uaddsubx helper_uaddsubx_arm
|
|
|
|
#define helper_udiv helper_udiv_arm
|
|
|
|
#define helper_uhadd16 helper_uhadd16_arm
|
|
|
|
#define helper_uhadd8 helper_uhadd8_arm
|
|
|
|
#define helper_uhaddsubx helper_uhaddsubx_arm
|
|
|
|
#define helper_uhsub16 helper_uhsub16_arm
|
|
|
|
#define helper_uhsub8 helper_uhsub8_arm
|
|
|
|
#define helper_uhsubaddx helper_uhsubaddx_arm
|
|
|
|
#define helper_uqadd16 helper_uqadd16_arm
|
|
|
|
#define helper_uqadd8 helper_uqadd8_arm
|
|
|
|
#define helper_uqaddsubx helper_uqaddsubx_arm
|
|
|
|
#define helper_uqsub16 helper_uqsub16_arm
|
|
|
|
#define helper_uqsub8 helper_uqsub8_arm
|
|
|
|
#define helper_uqsubaddx helper_uqsubaddx_arm
|
|
|
|
#define helper_usad8 helper_usad8_arm
|
|
|
|
#define helper_usat helper_usat_arm
|
|
|
|
#define helper_usat16 helper_usat16_arm
|
|
|
|
#define helper_usub16 helper_usub16_arm
|
|
|
|
#define helper_usub8 helper_usub8_arm
|
|
|
|
#define helper_usubaddx helper_usubaddx_arm
|
|
|
|
#define helper_uxtb16 helper_uxtb16_arm
|
2018-03-05 08:29:41 +00:00
|
|
|
#define helper_v7m_blxns helper_v7m_blxns_arm
|
2018-03-05 02:18:56 +00:00
|
|
|
#define helper_v7m_bxns helper_v7m_bxns_arm
|
2019-04-30 15:11:22 +00:00
|
|
|
#define helper_v7m_preserve_fp_state helper_v7m_preserve_fp_state_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_v7m_mrs helper_v7m_mrs_arm
|
|
|
|
#define helper_v7m_msr helper_v7m_msr_arm
|
2018-03-05 18:28:43 +00:00
|
|
|
#define helper_v7m_tt helper_v7m_tt_arm
|
2019-04-30 15:27:51 +00:00
|
|
|
#define helper_v7m_vlldm helper_v7m_vlldm_arm
|
2019-04-30 15:25:24 +00:00
|
|
|
#define helper_v7m_vlstm helper_v7m_vlstm_arm
|
2018-10-08 17:58:07 +00:00
|
|
|
#define helper_v8m_stackcheck helper_v8m_stackcheck_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_vfp_absd helper_vfp_absd_arm
|
|
|
|
#define helper_vfp_abss helper_vfp_abss_arm
|
|
|
|
#define helper_vfp_addd helper_vfp_addd_arm
|
|
|
|
#define helper_vfp_adds helper_vfp_adds_arm
|
|
|
|
#define helper_vfp_cmpd helper_vfp_cmpd_arm
|
2018-05-16 02:24:26 +00:00
|
|
|
#define helper_vfp_cmph_a64 helper_vfp_cmph_a64_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_vfp_cmped helper_vfp_cmped_arm
|
2018-05-16 02:24:26 +00:00
|
|
|
#define helper_vfp_cmpeh_a64 helper_vfp_cmpeh_a64_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_vfp_cmpes helper_vfp_cmpes_arm
|
|
|
|
#define helper_vfp_cmps helper_vfp_cmps_arm
|
|
|
|
#define helper_vfp_divd helper_vfp_divd_arm
|
|
|
|
#define helper_vfp_divs helper_vfp_divs_arm
|
|
|
|
#define helper_vfp_fcvt_f16_to_f32 helper_vfp_fcvt_f16_to_f32_arm
|
|
|
|
#define helper_vfp_fcvt_f16_to_f64 helper_vfp_fcvt_f16_to_f64_arm
|
|
|
|
#define helper_vfp_fcvt_f32_to_f16 helper_vfp_fcvt_f32_to_f16_arm
|
|
|
|
#define helper_vfp_fcvt_f64_to_f16 helper_vfp_fcvt_f64_to_f16_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define helper_vfp_fcvtds helper_vfp_fcvtds_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_vfp_fcvtsd helper_vfp_fcvtsd_arm
|
|
|
|
#define helper_vfp_get_fpscr helper_vfp_get_fpscr_arm
|
|
|
|
#define helper_vfp_maxd helper_vfp_maxd_arm
|
|
|
|
#define helper_vfp_maxnumd helper_vfp_maxnumd_arm
|
|
|
|
#define helper_vfp_maxnums helper_vfp_maxnums_arm
|
|
|
|
#define helper_vfp_maxs helper_vfp_maxs_arm
|
|
|
|
#define helper_vfp_mind helper_vfp_mind_arm
|
|
|
|
#define helper_vfp_minnumd helper_vfp_minnumd_arm
|
|
|
|
#define helper_vfp_minnums helper_vfp_minnums_arm
|
|
|
|
#define helper_vfp_mins helper_vfp_mins_arm
|
|
|
|
#define helper_vfp_muladdd helper_vfp_muladdd_arm
|
|
|
|
#define helper_vfp_muladds helper_vfp_muladds_arm
|
|
|
|
#define helper_vfp_muld helper_vfp_muld_arm
|
|
|
|
#define helper_vfp_muls helper_vfp_muls_arm
|
|
|
|
#define helper_vfp_negd helper_vfp_negd_arm
|
|
|
|
#define helper_vfp_negs helper_vfp_negs_arm
|
|
|
|
#define helper_vfp_set_fpscr helper_vfp_set_fpscr_arm
|
|
|
|
#define helper_vfp_shtod helper_vfp_shtod_arm
|
|
|
|
#define helper_vfp_shtos helper_vfp_shtos_arm
|
|
|
|
#define helper_vfp_sitod helper_vfp_sitod_arm
|
2018-03-08 23:35:47 +00:00
|
|
|
#define helper_vfp_sitoh helper_vfp_sitoh_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_vfp_sitos helper_vfp_sitos_arm
|
|
|
|
#define helper_vfp_sltod helper_vfp_sltod_arm
|
2018-03-08 23:35:47 +00:00
|
|
|
#define helper_vfp_sltoh helper_vfp_sltoh_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_vfp_sltos helper_vfp_sltos_arm
|
|
|
|
#define helper_vfp_sqrtd helper_vfp_sqrtd_arm
|
|
|
|
#define helper_vfp_sqrts helper_vfp_sqrts_arm
|
|
|
|
#define helper_vfp_sqtod helper_vfp_sqtod_arm
|
2018-05-16 02:02:17 +00:00
|
|
|
#define helper_vfp_sqtoh helper_vfp_sqtoh_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_vfp_sqtos helper_vfp_sqtos_arm
|
|
|
|
#define helper_vfp_subd helper_vfp_subd_arm
|
|
|
|
#define helper_vfp_subs helper_vfp_subs_arm
|
|
|
|
#define helper_vfp_toshd helper_vfp_toshd_arm
|
|
|
|
#define helper_vfp_toshd_round_to_zero helper_vfp_toshd_round_to_zero_arm
|
2018-05-14 12:39:20 +00:00
|
|
|
#define helper_vfp_toshh helper_vfp_toshh_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_vfp_toshs helper_vfp_toshs_arm
|
|
|
|
#define helper_vfp_toshs_round_to_zero helper_vfp_toshs_round_to_zero_arm
|
|
|
|
#define helper_vfp_tosid helper_vfp_tosid_arm
|
2018-03-08 23:35:47 +00:00
|
|
|
#define helper_vfp_tosih helper_vfp_tosih_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_vfp_tosis helper_vfp_tosis_arm
|
|
|
|
#define helper_vfp_tosizd helper_vfp_tosizd_arm
|
2018-03-08 23:35:47 +00:00
|
|
|
#define helper_vfp_tosizh helper_vfp_tosizh_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_vfp_tosizs helper_vfp_tosizs_arm
|
|
|
|
#define helper_vfp_tosld helper_vfp_tosld_arm
|
|
|
|
#define helper_vfp_tosld_round_to_zero helper_vfp_tosld_round_to_zero_arm
|
2018-03-08 23:35:47 +00:00
|
|
|
#define helper_vfp_toslh helper_vfp_toslh_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_vfp_tosls helper_vfp_tosls_arm
|
|
|
|
#define helper_vfp_tosls_round_to_zero helper_vfp_tosls_round_to_zero_arm
|
|
|
|
#define helper_vfp_tosqd helper_vfp_tosqd_arm
|
2018-05-16 02:02:17 +00:00
|
|
|
#define helper_vfp_tosqh helper_vfp_tosqh_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_vfp_tosqs helper_vfp_tosqs_arm
|
|
|
|
#define helper_vfp_touhd helper_vfp_touhd_arm
|
|
|
|
#define helper_vfp_touhd_round_to_zero helper_vfp_touhd_round_to_zero_arm
|
2018-05-14 12:39:20 +00:00
|
|
|
#define helper_vfp_touhh helper_vfp_touhh_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_vfp_touhs helper_vfp_touhs_arm
|
|
|
|
#define helper_vfp_touhs_round_to_zero helper_vfp_touhs_round_to_zero_arm
|
|
|
|
#define helper_vfp_touid helper_vfp_touid_arm
|
2018-03-08 23:35:47 +00:00
|
|
|
#define helper_vfp_touih helper_vfp_touih_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_vfp_touis helper_vfp_touis_arm
|
|
|
|
#define helper_vfp_touizd helper_vfp_touizd_arm
|
2018-03-08 23:35:47 +00:00
|
|
|
#define helper_vfp_touizh helper_vfp_touizh_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_vfp_touizs helper_vfp_touizs_arm
|
|
|
|
#define helper_vfp_tould helper_vfp_tould_arm
|
|
|
|
#define helper_vfp_tould_round_to_zero helper_vfp_tould_round_to_zero_arm
|
2018-03-08 23:35:47 +00:00
|
|
|
#define helper_vfp_toulh helper_vfp_toulh_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_vfp_touls helper_vfp_touls_arm
|
|
|
|
#define helper_vfp_touls_round_to_zero helper_vfp_touls_round_to_zero_arm
|
|
|
|
#define helper_vfp_touqd helper_vfp_touqd_arm
|
2018-05-16 02:02:17 +00:00
|
|
|
#define helper_vfp_touqh helper_vfp_touqh_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_vfp_touqs helper_vfp_touqs_arm
|
|
|
|
#define helper_vfp_uhtod helper_vfp_uhtod_arm
|
|
|
|
#define helper_vfp_uhtos helper_vfp_uhtos_arm
|
|
|
|
#define helper_vfp_uitod helper_vfp_uitod_arm
|
2018-03-08 23:35:47 +00:00
|
|
|
#define helper_vfp_uitoh helper_vfp_uitoh_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_vfp_uitos helper_vfp_uitos_arm
|
|
|
|
#define helper_vfp_ultod helper_vfp_ultod_arm
|
2018-03-08 23:35:47 +00:00
|
|
|
#define helper_vfp_ultoh helper_vfp_ultoh_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_vfp_ultos helper_vfp_ultos_arm
|
|
|
|
#define helper_vfp_uqtod helper_vfp_uqtod_arm
|
2018-05-16 02:02:17 +00:00
|
|
|
#define helper_vfp_uqtoh helper_vfp_uqtoh_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define helper_vfp_uqtos helper_vfp_uqtos_arm
|
|
|
|
#define helper_wfe helper_wfe_arm
|
|
|
|
#define helper_wfi helper_wfi_arm
|
2018-02-14 03:46:56 +00:00
|
|
|
#define helper_yield helper_yield_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define hex2decimal hex2decimal_arm
|
|
|
|
#define hw_breakpoint_update hw_breakpoint_update_arm
|
|
|
|
#define hw_breakpoint_update_all hw_breakpoint_update_all_arm
|
|
|
|
#define hw_watchpoint_update hw_watchpoint_update_arm
|
|
|
|
#define hw_watchpoint_update_all hw_watchpoint_update_all_arm
|
|
|
|
#define init_cpreg_list init_cpreg_list_arm
|
|
|
|
#define init_lists init_lists_arm
|
|
|
|
#define input_type_enum input_type_enum_arm
|
|
|
|
#define int128_2_64 int128_2_64_arm
|
|
|
|
#define int128_add int128_add_arm
|
|
|
|
#define int128_addto int128_addto_arm
|
|
|
|
#define int128_and int128_and_arm
|
|
|
|
#define int128_eq int128_eq_arm
|
|
|
|
#define int128_ge int128_ge_arm
|
|
|
|
#define int128_get64 int128_get64_arm
|
|
|
|
#define int128_gt int128_gt_arm
|
|
|
|
#define int128_le int128_le_arm
|
|
|
|
#define int128_lt int128_lt_arm
|
|
|
|
#define int128_make64 int128_make64_arm
|
|
|
|
#define int128_max int128_max_arm
|
|
|
|
#define int128_min int128_min_arm
|
|
|
|
#define int128_ne int128_ne_arm
|
|
|
|
#define int128_neg int128_neg_arm
|
|
|
|
#define int128_nz int128_nz_arm
|
|
|
|
#define int128_rshift int128_rshift_arm
|
|
|
|
#define int128_sub int128_sub_arm
|
|
|
|
#define int128_subfrom int128_subfrom_arm
|
|
|
|
#define int128_zero int128_zero_arm
|
2018-03-08 17:05:05 +00:00
|
|
|
#define int16_to_float16 int16_to_float16_arm
|
2018-08-25 07:41:26 +00:00
|
|
|
#define int16_to_float16_scalbn int16_to_float16_scalbn_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define int16_to_float32 int16_to_float32_arm
|
2018-08-25 07:41:26 +00:00
|
|
|
#define int16_to_float32_scalbn int16_to_float32_scalbn_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define int16_to_float64 int16_to_float64_arm
|
2018-08-25 07:41:26 +00:00
|
|
|
#define int16_to_float64_scalbn int16_to_float64_scalbn_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define int32_to_float128 int32_to_float128_arm
|
2018-03-08 17:10:00 +00:00
|
|
|
#define int32_to_float16 int32_to_float16_arm
|
2018-08-25 07:41:26 +00:00
|
|
|
#define int32_to_float16_scalbn int32_to_float16_scalbn_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define int32_to_float32 int32_to_float32_arm
|
2018-08-25 07:41:26 +00:00
|
|
|
#define int32_to_float32_scalbn int32_to_float32_scalbn_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define int32_to_float64 int32_to_float64_arm
|
2018-08-25 07:41:26 +00:00
|
|
|
#define int32_to_float64_scalbn int32_to_float64_scalbn_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define int32_to_floatx80 int32_to_floatx80_arm
|
|
|
|
#define int64_to_float128 int64_to_float128_arm
|
2018-03-08 17:10:00 +00:00
|
|
|
#define int64_to_float16 int64_to_float16_arm
|
2018-08-25 07:41:26 +00:00
|
|
|
#define int64_to_float16_scalbn int64_to_float16_scalbn_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define int64_to_float32 int64_to_float32_arm
|
2018-08-25 07:41:26 +00:00
|
|
|
#define int64_to_float32_scalbn int64_to_float32_scalbn_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define int64_to_float64 int64_to_float64_arm
|
2018-08-25 07:41:26 +00:00
|
|
|
#define int64_to_float64_scalbn int64_to_float64_scalbn_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define int64_to_floatx80 int64_to_floatx80_arm
|
|
|
|
#define invalidate_and_set_dirty invalidate_and_set_dirty_arm
|
|
|
|
#define invalidate_page_bitmap invalidate_page_bitmap_arm
|
|
|
|
#define io_readb io_readb_arm
|
|
|
|
#define io_readl io_readl_arm
|
|
|
|
#define io_readq io_readq_arm
|
|
|
|
#define io_readw io_readw_arm
|
|
|
|
#define io_writeb io_writeb_arm
|
|
|
|
#define io_writel io_writel_arm
|
|
|
|
#define io_writeq io_writeq_arm
|
|
|
|
#define io_writew io_writew_arm
|
2018-06-15 16:01:23 +00:00
|
|
|
#define iotlb_to_section iotlb_to_section_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define is_a64 is_a64_arm
|
|
|
|
#define is_help_option is_help_option_arm
|
|
|
|
#define is_valid_option_list is_valid_option_list_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define isr_read isr_read_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define iwmmxt_load_creg iwmmxt_load_creg_arm
|
|
|
|
#define iwmmxt_load_reg iwmmxt_load_reg_arm
|
|
|
|
#define iwmmxt_store_creg iwmmxt_store_creg_arm
|
|
|
|
#define iwmmxt_store_reg iwmmxt_store_reg_arm
|
|
|
|
#define kvm_to_cpreg_id kvm_to_cpreg_id_arm
|
|
|
|
#define last_ram_offset last_ram_offset_arm
|
|
|
|
#define ldl_be_p ldl_be_p_arm
|
|
|
|
#define ldl_be_phys ldl_be_phys_arm
|
2018-03-01 15:10:15 +00:00
|
|
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#define ldl_be_phys_cached ldl_be_phys_cached_arm
|
2015-08-21 07:04:50 +00:00
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#define ldl_he_p ldl_he_p_arm
|
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#define ldl_le_p ldl_le_p_arm
|
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#define ldl_le_phys ldl_le_phys_arm
|
2018-03-01 15:10:15 +00:00
|
|
|
#define ldl_le_phys_cached ldl_le_phys_cached_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define ldl_phys ldl_phys_arm
|
2018-03-01 15:10:15 +00:00
|
|
|
#define ldl_phys_cached ldl_phys_cached_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define ldl_phys_internal ldl_phys_internal_arm
|
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#define ldq_be_p ldq_be_p_arm
|
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|
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#define ldq_be_phys ldq_be_phys_arm
|
2018-03-01 15:10:15 +00:00
|
|
|
#define ldq_be_phys_cached ldq_be_phys_cached_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define ldq_he_p ldq_he_p_arm
|
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|
#define ldq_le_p ldq_le_p_arm
|
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|
|
#define ldq_le_phys ldq_le_phys_arm
|
2018-03-01 15:10:15 +00:00
|
|
|
#define ldq_le_phys_cached ldq_le_phys_cached_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define ldq_phys ldq_phys_arm
|
2018-03-01 15:10:15 +00:00
|
|
|
#define ldq_phys_cached ldq_phys_cached_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define ldq_phys_internal ldq_phys_internal_arm
|
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|
#define ldst_name ldst_name_arm
|
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|
#define ldub_p ldub_p_arm
|
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|
|
#define ldub_phys ldub_phys_arm
|
2018-03-01 15:10:15 +00:00
|
|
|
#define ldub_phys_cached ldub_phys_cached_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define lduw_be_p lduw_be_p_arm
|
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|
|
#define lduw_be_phys lduw_be_phys_arm
|
2018-03-01 15:10:15 +00:00
|
|
|
#define lduw_be_phys_cached lduw_be_phys_cached_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define lduw_he_p lduw_he_p_arm
|
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|
#define lduw_le_p lduw_le_p_arm
|
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|
|
#define lduw_le_phys lduw_le_phys_arm
|
2018-03-01 15:10:15 +00:00
|
|
|
#define lduw_le_phys_cached lduw_le_phys_cached_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define lduw_phys lduw_phys_arm
|
2018-03-01 15:10:15 +00:00
|
|
|
#define lduw_phys_cached lduw_phys_cached_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define lduw_phys_internal lduw_phys_internal_arm
|
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|
|
#define le128 le128_arm
|
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|
|
#define linked_bp_matches linked_bp_matches_arm
|
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|
#define listener_add_address_space listener_add_address_space_arm
|
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|
|
#define load_cpu_offset load_cpu_offset_arm
|
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|
|
#define load_reg load_reg_arm
|
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|
|
#define load_reg_var load_reg_var_arm
|
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|
|
#define log_cpu_state log_cpu_state_arm
|
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|
|
#define lpae_cp_reginfo lpae_cp_reginfo_arm
|
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|
|
#define lt128 lt128_arm
|
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|
|
#define machine_class_init machine_class_init_arm
|
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|
#define machine_finalize machine_finalize_arm
|
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|
|
#define machine_info machine_info_arm
|
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|
|
#define machine_initfn machine_initfn_arm
|
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|
|
#define machine_register_types machine_register_types_arm
|
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|
|
#define machvirt_init machvirt_init_arm
|
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|
|
#define machvirt_machine_init machvirt_machine_init_arm
|
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|
|
#define maj maj_arm
|
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|
|
#define mapping_conflict mapping_conflict_arm
|
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|
|
#define mapping_contiguous mapping_contiguous_arm
|
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|
|
#define mapping_have_same_region mapping_have_same_region_arm
|
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|
|
#define mapping_merge mapping_merge_arm
|
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|
|
#define memory_access_size memory_access_size_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define memory_free memory_free_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define memory_init memory_init_arm
|
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|
|
#define memory_listener_match memory_listener_match_arm
|
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|
|
#define memory_listener_register memory_listener_register_arm
|
|
|
|
#define memory_listener_unregister memory_listener_unregister_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define memory_map memory_map_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define memory_map_init memory_map_init_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define memory_map_ptr memory_map_ptr_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define memory_mapping_filter memory_mapping_filter_arm
|
|
|
|
#define memory_mapping_list_add_mapping_sorted memory_mapping_list_add_mapping_sorted_arm
|
|
|
|
#define memory_mapping_list_add_merge_sorted memory_mapping_list_add_merge_sorted_arm
|
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|
|
#define memory_mapping_list_free memory_mapping_list_free_arm
|
|
|
|
#define memory_mapping_list_init memory_mapping_list_init_arm
|
|
|
|
#define memory_region_access_valid memory_region_access_valid_arm
|
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|
|
#define memory_region_add_subregion memory_region_add_subregion_arm
|
|
|
|
#define memory_region_add_subregion_common memory_region_add_subregion_common_arm
|
|
|
|
#define memory_region_add_subregion_overlap memory_region_add_subregion_overlap_arm
|
|
|
|
#define memory_region_big_endian memory_region_big_endian_arm
|
2018-02-14 13:36:25 +00:00
|
|
|
#define memory_region_clear_global_locking memory_region_clear_global_locking_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define memory_region_clear_pending memory_region_clear_pending_arm
|
|
|
|
#define memory_region_del_subregion memory_region_del_subregion_arm
|
|
|
|
#define memory_region_destructor_alias memory_region_destructor_alias_arm
|
|
|
|
#define memory_region_destructor_none memory_region_destructor_none_arm
|
|
|
|
#define memory_region_destructor_ram memory_region_destructor_ram_arm
|
|
|
|
#define memory_region_destructor_ram_from_ptr memory_region_destructor_ram_from_ptr_arm
|
|
|
|
#define memory_region_dispatch_read memory_region_dispatch_read_arm
|
|
|
|
#define memory_region_dispatch_read1 memory_region_dispatch_read1_arm
|
|
|
|
#define memory_region_dispatch_write memory_region_dispatch_write_arm
|
|
|
|
#define memory_region_escape_name memory_region_escape_name_arm
|
|
|
|
#define memory_region_finalize memory_region_finalize_arm
|
|
|
|
#define memory_region_find memory_region_find_arm
|
2018-02-24 20:52:04 +00:00
|
|
|
#define memory_region_from_host memory_region_from_host_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define memory_region_get_addr memory_region_get_addr_arm
|
|
|
|
#define memory_region_get_alignment memory_region_get_alignment_arm
|
|
|
|
#define memory_region_get_container memory_region_get_container_arm
|
2018-02-13 13:41:40 +00:00
|
|
|
#define memory_region_get_dirty_log_mask memory_region_get_dirty_log_mask_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define memory_region_get_fd memory_region_get_fd_arm
|
|
|
|
#define memory_region_get_may_overlap memory_region_get_may_overlap_arm
|
|
|
|
#define memory_region_get_priority memory_region_get_priority_arm
|
2018-02-21 13:00:50 +00:00
|
|
|
#define memory_region_get_ram_addr memory_region_get_ram_addr_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define memory_region_get_ram_ptr memory_region_get_ram_ptr_arm
|
|
|
|
#define memory_region_get_size memory_region_get_size_arm
|
|
|
|
#define memory_region_info memory_region_info_arm
|
|
|
|
#define memory_region_init memory_region_init_arm
|
|
|
|
#define memory_region_init_alias memory_region_init_alias_arm
|
|
|
|
#define memory_region_init_io memory_region_init_io_arm
|
2018-02-26 03:59:02 +00:00
|
|
|
#define memory_region_init_ram_device_ptr memory_region_init_ram_device_ptr_arm
|
2018-03-04 03:23:26 +00:00
|
|
|
#define memory_region_init_ram_nomigrate memory_region_init_ram_nomigrate_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define memory_region_init_ram_ptr memory_region_init_ram_ptr_arm
|
|
|
|
#define memory_region_init_reservation memory_region_init_reservation_arm
|
2018-02-17 22:02:55 +00:00
|
|
|
#define memory_region_init_resizeable_ram memory_region_init_resizeable_ram_arm
|
2018-03-04 03:28:41 +00:00
|
|
|
#define memory_region_init_rom_nomigrate memory_region_init_rom_nomigrate_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define memory_region_initfn memory_region_initfn_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define memory_region_is_logging memory_region_is_logging_arm
|
|
|
|
#define memory_region_is_mapped memory_region_is_mapped_arm
|
2018-02-26 03:59:02 +00:00
|
|
|
#define memory_region_is_ram_device memory_region_is_ram_device_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define memory_region_is_unassigned memory_region_is_unassigned_arm
|
|
|
|
#define memory_region_name memory_region_name_arm
|
|
|
|
#define memory_region_need_escape memory_region_need_escape_arm
|
|
|
|
#define memory_region_oldmmio_read_accessor memory_region_oldmmio_read_accessor_arm
|
|
|
|
#define memory_region_oldmmio_write_accessor memory_region_oldmmio_write_accessor_arm
|
|
|
|
#define memory_region_present memory_region_present_arm
|
|
|
|
#define memory_region_read_accessor memory_region_read_accessor_arm
|
|
|
|
#define memory_region_readd_subregion memory_region_readd_subregion_arm
|
|
|
|
#define memory_region_ref memory_region_ref_arm
|
|
|
|
#define memory_region_resolve_container memory_region_resolve_container_arm
|
|
|
|
#define memory_region_rom_device_set_romd memory_region_rom_device_set_romd_arm
|
|
|
|
#define memory_region_section_get_iotlb memory_region_section_get_iotlb_arm
|
|
|
|
#define memory_region_set_address memory_region_set_address_arm
|
|
|
|
#define memory_region_set_alias_offset memory_region_set_alias_offset_arm
|
|
|
|
#define memory_region_set_enabled memory_region_set_enabled_arm
|
2018-11-11 13:47:02 +00:00
|
|
|
#define memory_region_set_nonvolatile memory_region_set_nonvolatile_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define memory_region_set_readonly memory_region_set_readonly_arm
|
2018-02-17 21:02:13 +00:00
|
|
|
#define memory_region_set_size memory_region_set_size_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define memory_region_size memory_region_size_arm
|
|
|
|
#define memory_region_to_address_space memory_region_to_address_space_arm
|
|
|
|
#define memory_region_transaction_begin memory_region_transaction_begin_arm
|
|
|
|
#define memory_region_transaction_commit memory_region_transaction_commit_arm
|
|
|
|
#define memory_region_unref memory_region_unref_arm
|
|
|
|
#define memory_region_update_container_subregions memory_region_update_container_subregions_arm
|
|
|
|
#define memory_region_write_accessor memory_region_write_accessor_arm
|
|
|
|
#define memory_region_wrong_endianness memory_region_wrong_endianness_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define memory_register_types memory_register_types_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define memory_try_enable_merging memory_try_enable_merging_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define memory_unmap memory_unmap_arm
|
2019-02-15 22:27:27 +00:00
|
|
|
#define modify_arm_cp_regs modify_arm_cp_regs_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define module_call_init module_call_init_arm
|
|
|
|
#define module_load module_load_arm
|
|
|
|
#define mpidr_cp_reginfo mpidr_cp_reginfo_arm
|
|
|
|
#define mpidr_read mpidr_read_arm
|
|
|
|
#define msr_mask msr_mask_arm
|
|
|
|
#define mul128By64To192 mul128By64To192_arm
|
|
|
|
#define mul128To256 mul128To256_arm
|
|
|
|
#define mul64To128 mul64To128_arm
|
|
|
|
#define muldiv64 muldiv64_arm
|
|
|
|
#define neon_2rm_is_float_op neon_2rm_is_float_op_arm
|
|
|
|
#define neon_2rm_sizes neon_2rm_sizes_arm
|
|
|
|
#define neon_3r_sizes neon_3r_sizes_arm
|
|
|
|
#define neon_get_scalar neon_get_scalar_arm
|
|
|
|
#define neon_load_reg neon_load_reg_arm
|
|
|
|
#define neon_load_reg64 neon_load_reg64_arm
|
|
|
|
#define neon_load_scratch neon_load_scratch_arm
|
|
|
|
#define neon_ls_element_type neon_ls_element_type_arm
|
|
|
|
#define neon_reg_offset neon_reg_offset_arm
|
|
|
|
#define neon_store_reg neon_store_reg_arm
|
|
|
|
#define neon_store_reg64 neon_store_reg64_arm
|
|
|
|
#define neon_store_scratch neon_store_scratch_arm
|
|
|
|
#define new_ldst_label new_ldst_label_arm
|
|
|
|
#define next_list next_list_arm
|
|
|
|
#define normalizeFloat128Subnormal normalizeFloat128Subnormal_arm
|
|
|
|
#define normalizeFloat16Subnormal normalizeFloat16Subnormal_arm
|
|
|
|
#define normalizeFloat32Subnormal normalizeFloat32Subnormal_arm
|
|
|
|
#define normalizeFloat64Subnormal normalizeFloat64Subnormal_arm
|
|
|
|
#define normalizeFloatx80Subnormal normalizeFloatx80Subnormal_arm
|
|
|
|
#define normalizeRoundAndPackFloat128 normalizeRoundAndPackFloat128_arm
|
|
|
|
#define normalizeRoundAndPackFloat32 normalizeRoundAndPackFloat32_arm
|
|
|
|
#define normalizeRoundAndPackFloat64 normalizeRoundAndPackFloat64_arm
|
|
|
|
#define normalizeRoundAndPackFloatx80 normalizeRoundAndPackFloatx80_arm
|
|
|
|
#define not_v6_cp_reginfo not_v6_cp_reginfo_arm
|
|
|
|
#define not_v7_cp_reginfo not_v7_cp_reginfo_arm
|
|
|
|
#define not_v8_cp_reginfo not_v8_cp_reginfo_arm
|
|
|
|
#define object_child_foreach object_child_foreach_arm
|
2018-02-15 16:13:21 +00:00
|
|
|
#define object_child_foreach_recursive object_child_foreach_recursive_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define object_class_foreach object_class_foreach_arm
|
|
|
|
#define object_class_foreach_tramp object_class_foreach_tramp_arm
|
|
|
|
#define object_class_get_list object_class_get_list_arm
|
2018-03-17 23:16:19 +00:00
|
|
|
#define object_class_get_list_sorted object_class_get_list_sorted_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define object_class_get_list_tramp object_class_get_list_tramp_arm
|
|
|
|
#define object_class_get_parent object_class_get_parent_arm
|
|
|
|
#define object_deinit object_deinit_arm
|
|
|
|
#define object_dynamic_cast object_dynamic_cast_arm
|
|
|
|
#define object_finalize object_finalize_arm
|
|
|
|
#define object_finalize_child_property object_finalize_child_property_arm
|
|
|
|
#define object_get_child_property object_get_child_property_arm
|
2018-03-05 06:16:25 +00:00
|
|
|
#define object_get_internal_root object_get_internal_root_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define object_get_link_property object_get_link_property_arm
|
|
|
|
#define object_get_root object_get_root_arm
|
|
|
|
#define object_init_with_type object_init_with_type_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define object_initialize_with_type object_initialize_with_type_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define object_instance_init object_instance_init_arm
|
|
|
|
#define object_new_with_type object_new_with_type_arm
|
|
|
|
#define object_post_init_with_type object_post_init_with_type_arm
|
|
|
|
#define object_property_add_alias object_property_add_alias_arm
|
|
|
|
#define object_property_add_link object_property_add_link_arm
|
|
|
|
#define object_property_add_uint16_ptr object_property_add_uint16_ptr_arm
|
|
|
|
#define object_property_add_uint32_ptr object_property_add_uint32_ptr_arm
|
|
|
|
#define object_property_add_uint64_ptr object_property_add_uint64_ptr_arm
|
|
|
|
#define object_property_add_uint8_ptr object_property_add_uint8_ptr_arm
|
|
|
|
#define object_property_allow_set_link object_property_allow_set_link_arm
|
|
|
|
#define object_property_del object_property_del_arm
|
|
|
|
#define object_property_del_all object_property_del_all_arm
|
|
|
|
#define object_property_find object_property_find_arm
|
|
|
|
#define object_property_get object_property_get_arm
|
|
|
|
#define object_property_get_bool object_property_get_bool_arm
|
|
|
|
#define object_property_get_int object_property_get_int_arm
|
|
|
|
#define object_property_get_link object_property_get_link_arm
|
|
|
|
#define object_property_get_qobject object_property_get_qobject_arm
|
|
|
|
#define object_property_get_str object_property_get_str_arm
|
|
|
|
#define object_property_get_type object_property_get_type_arm
|
|
|
|
#define object_property_is_child object_property_is_child_arm
|
|
|
|
#define object_property_set object_property_set_arm
|
|
|
|
#define object_property_set_description object_property_set_description_arm
|
|
|
|
#define object_property_set_link object_property_set_link_arm
|
|
|
|
#define object_property_set_qobject object_property_set_qobject_arm
|
|
|
|
#define object_release_link_property object_release_link_property_arm
|
|
|
|
#define object_resolve_abs_path object_resolve_abs_path_arm
|
|
|
|
#define object_resolve_child_property object_resolve_child_property_arm
|
|
|
|
#define object_resolve_link object_resolve_link_arm
|
|
|
|
#define object_resolve_link_property object_resolve_link_property_arm
|
|
|
|
#define object_resolve_partial_path object_resolve_partial_path_arm
|
|
|
|
#define object_resolve_path object_resolve_path_arm
|
|
|
|
#define object_resolve_path_component object_resolve_path_component_arm
|
|
|
|
#define object_resolve_path_type object_resolve_path_type_arm
|
|
|
|
#define object_set_link_property object_set_link_property_arm
|
2018-02-24 23:59:25 +00:00
|
|
|
#define object_type_get_instance_size object_type_get_instance_size_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define omap_cachemaint_write omap_cachemaint_write_arm
|
|
|
|
#define omap_cp_reginfo omap_cp_reginfo_arm
|
|
|
|
#define omap_threadid_write omap_threadid_write_arm
|
|
|
|
#define omap_ticonfig_write omap_ticonfig_write_arm
|
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|
|
#define omap_wfi_write omap_wfi_write_arm
|
|
|
|
#define op_bits op_bits_arm
|
|
|
|
#define op_to_mov op_to_mov_arm
|
|
|
|
#define op_to_movi op_to_movi_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define open_modeflags open_modeflags_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define output_type_enum output_type_enum_arm
|
|
|
|
#define packFloat128 packFloat128_arm
|
|
|
|
#define packFloat16 packFloat16_arm
|
|
|
|
#define packFloat32 packFloat32_arm
|
|
|
|
#define packFloat64 packFloat64_arm
|
|
|
|
#define packFloatx80 packFloatx80_arm
|
|
|
|
#define page_find page_find_arm
|
|
|
|
#define page_find_alloc page_find_alloc_arm
|
|
|
|
#define page_flush_tb page_flush_tb_arm
|
|
|
|
#define page_flush_tb_1 page_flush_tb_1_arm
|
|
|
|
#define page_init page_init_arm
|
|
|
|
#define page_size_init page_size_init_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define par_write par_write_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define parse_array parse_array_arm
|
2018-03-20 17:47:38 +00:00
|
|
|
#define parse_cpu_model parse_cpu_model_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define parse_error parse_error_arm
|
|
|
|
#define parse_escape parse_escape_arm
|
|
|
|
#define parse_keyword parse_keyword_arm
|
|
|
|
#define parse_literal parse_literal_arm
|
|
|
|
#define parse_object parse_object_arm
|
|
|
|
#define parse_option_bool parse_option_bool_arm
|
|
|
|
#define parse_option_number parse_option_number_arm
|
|
|
|
#define parse_option_size parse_option_size_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define parse_optional parse_optional_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define parse_pair parse_pair_arm
|
|
|
|
#define parse_str parse_str_arm
|
|
|
|
#define parse_type_bool parse_type_bool_arm
|
|
|
|
#define parse_type_int parse_type_int_arm
|
|
|
|
#define parse_type_number parse_type_number_arm
|
|
|
|
#define parse_type_size parse_type_size_arm
|
|
|
|
#define parse_type_str parse_type_str_arm
|
|
|
|
#define parse_value parse_value_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define parser_context_free parser_context_free_arm
|
|
|
|
#define parser_context_new parser_context_new_arm
|
|
|
|
#define parser_context_peek_token parser_context_peek_token_arm
|
|
|
|
#define parser_context_pop_token parser_context_pop_token_arm
|
|
|
|
#define parser_context_restore parser_context_restore_arm
|
|
|
|
#define parser_context_save parser_context_save_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define patch_reloc patch_reloc_arm
|
|
|
|
#define phys_map_node_alloc phys_map_node_alloc_arm
|
|
|
|
#define phys_map_node_reserve phys_map_node_reserve_arm
|
|
|
|
#define phys_mem_alloc phys_mem_alloc_arm
|
|
|
|
#define phys_mem_set_alloc phys_mem_set_alloc_arm
|
|
|
|
#define phys_page_compact phys_page_compact_arm
|
|
|
|
#define phys_page_compact_all phys_page_compact_all_arm
|
|
|
|
#define phys_page_find phys_page_find_arm
|
|
|
|
#define phys_page_set phys_page_set_arm
|
|
|
|
#define phys_page_set_level phys_page_set_level_arm
|
|
|
|
#define phys_section_add phys_section_add_arm
|
|
|
|
#define phys_section_destroy phys_section_destroy_arm
|
|
|
|
#define phys_sections_free phys_sections_free_arm
|
|
|
|
#define pickNaN pickNaN_arm
|
|
|
|
#define pickNaNMulAdd pickNaNMulAdd_arm
|
|
|
|
#define pmccfiltr_write pmccfiltr_write_arm
|
|
|
|
#define pmccntr_read pmccntr_read_arm
|
|
|
|
#define pmccntr_write pmccntr_write_arm
|
|
|
|
#define pmccntr_write32 pmccntr_write32_arm
|
|
|
|
#define pmcntenclr_write pmcntenclr_write_arm
|
|
|
|
#define pmcntenset_write pmcntenset_write_arm
|
|
|
|
#define pmcr_write pmcr_write_arm
|
|
|
|
#define pmintenclr_write pmintenclr_write_arm
|
|
|
|
#define pmintenset_write pmintenset_write_arm
|
|
|
|
#define pmovsr_write pmovsr_write_arm
|
|
|
|
#define pmreg_access pmreg_access_arm
|
|
|
|
#define pmsav5_cp_reginfo pmsav5_cp_reginfo_arm
|
|
|
|
#define pmsav5_data_ap_read pmsav5_data_ap_read_arm
|
|
|
|
#define pmsav5_data_ap_write pmsav5_data_ap_write_arm
|
|
|
|
#define pmsav5_insn_ap_read pmsav5_insn_ap_read_arm
|
|
|
|
#define pmsav5_insn_ap_write pmsav5_insn_ap_write_arm
|
|
|
|
#define pmuserenr_write pmuserenr_write_arm
|
|
|
|
#define pmxevtyper_write pmxevtyper_write_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define ppc_tb_set_jmp_target ppc_tb_set_jmp_target_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define print_type_bool print_type_bool_arm
|
|
|
|
#define print_type_int print_type_int_arm
|
|
|
|
#define print_type_number print_type_number_arm
|
|
|
|
#define print_type_size print_type_size_arm
|
|
|
|
#define print_type_str print_type_str_arm
|
2018-02-27 17:17:15 +00:00
|
|
|
#define probe_write probe_write_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define propagateFloat128NaN propagateFloat128NaN_arm
|
|
|
|
#define propagateFloat32MulAddNaN propagateFloat32MulAddNaN_arm
|
|
|
|
#define propagateFloat32NaN propagateFloat32NaN_arm
|
|
|
|
#define propagateFloat64MulAddNaN propagateFloat64MulAddNaN_arm
|
|
|
|
#define propagateFloat64NaN propagateFloat64NaN_arm
|
|
|
|
#define propagateFloatx80NaN propagateFloatx80NaN_arm
|
|
|
|
#define property_get_alias property_get_alias_arm
|
|
|
|
#define property_get_bool property_get_bool_arm
|
|
|
|
#define property_get_str property_get_str_arm
|
|
|
|
#define property_get_uint16_ptr property_get_uint16_ptr_arm
|
|
|
|
#define property_get_uint32_ptr property_get_uint32_ptr_arm
|
|
|
|
#define property_get_uint64_ptr property_get_uint64_ptr_arm
|
|
|
|
#define property_get_uint8_ptr property_get_uint8_ptr_arm
|
|
|
|
#define property_release_alias property_release_alias_arm
|
|
|
|
#define property_release_bool property_release_bool_arm
|
|
|
|
#define property_release_str property_release_str_arm
|
|
|
|
#define property_resolve_alias property_resolve_alias_arm
|
|
|
|
#define property_set_alias property_set_alias_arm
|
|
|
|
#define property_set_bool property_set_bool_arm
|
|
|
|
#define property_set_str property_set_str_arm
|
|
|
|
#define pstate_read pstate_read_arm
|
|
|
|
#define pstate_write pstate_write_arm
|
|
|
|
#define pxa250_initfn pxa250_initfn_arm
|
|
|
|
#define pxa255_initfn pxa255_initfn_arm
|
|
|
|
#define pxa260_initfn pxa260_initfn_arm
|
|
|
|
#define pxa261_initfn pxa261_initfn_arm
|
|
|
|
#define pxa262_initfn pxa262_initfn_arm
|
|
|
|
#define pxa270a0_initfn pxa270a0_initfn_arm
|
|
|
|
#define pxa270a1_initfn pxa270a1_initfn_arm
|
|
|
|
#define pxa270b0_initfn pxa270b0_initfn_arm
|
|
|
|
#define pxa270b1_initfn pxa270b1_initfn_arm
|
|
|
|
#define pxa270c0_initfn pxa270c0_initfn_arm
|
|
|
|
#define pxa270c5_initfn pxa270c5_initfn_arm
|
|
|
|
#define qapi_dealloc_end_implicit_struct qapi_dealloc_end_implicit_struct_arm
|
|
|
|
#define qapi_dealloc_end_list qapi_dealloc_end_list_arm
|
|
|
|
#define qapi_dealloc_end_struct qapi_dealloc_end_struct_arm
|
|
|
|
#define qapi_dealloc_get_visitor qapi_dealloc_get_visitor_arm
|
|
|
|
#define qapi_dealloc_next_list qapi_dealloc_next_list_arm
|
|
|
|
#define qapi_dealloc_pop qapi_dealloc_pop_arm
|
|
|
|
#define qapi_dealloc_push qapi_dealloc_push_arm
|
|
|
|
#define qapi_dealloc_start_implicit_struct qapi_dealloc_start_implicit_struct_arm
|
|
|
|
#define qapi_dealloc_start_list qapi_dealloc_start_list_arm
|
|
|
|
#define qapi_dealloc_start_struct qapi_dealloc_start_struct_arm
|
|
|
|
#define qapi_dealloc_start_union qapi_dealloc_start_union_arm
|
|
|
|
#define qapi_dealloc_type_bool qapi_dealloc_type_bool_arm
|
|
|
|
#define qapi_dealloc_type_enum qapi_dealloc_type_enum_arm
|
|
|
|
#define qapi_dealloc_type_int qapi_dealloc_type_int_arm
|
|
|
|
#define qapi_dealloc_type_number qapi_dealloc_type_number_arm
|
|
|
|
#define qapi_dealloc_type_size qapi_dealloc_type_size_arm
|
|
|
|
#define qapi_dealloc_type_str qapi_dealloc_type_str_arm
|
|
|
|
#define qapi_dealloc_visitor_cleanup qapi_dealloc_visitor_cleanup_arm
|
|
|
|
#define qapi_dealloc_visitor_new qapi_dealloc_visitor_new_arm
|
|
|
|
#define qapi_free_ErrorClassList qapi_free_ErrorClassList_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define qapi_free_X86CPUFeatureWordInfo qapi_free_X86CPUFeatureWordInfo_arm
|
|
|
|
#define qapi_free_X86CPUFeatureWordInfoList qapi_free_X86CPUFeatureWordInfoList_arm
|
|
|
|
#define qapi_free_X86CPURegister32List qapi_free_X86CPURegister32List_arm
|
|
|
|
#define qapi_free_boolList qapi_free_boolList_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define qapi_free_int16List qapi_free_int16List_arm
|
|
|
|
#define qapi_free_int32List qapi_free_int32List_arm
|
|
|
|
#define qapi_free_int64List qapi_free_int64List_arm
|
|
|
|
#define qapi_free_int8List qapi_free_int8List_arm
|
|
|
|
#define qapi_free_intList qapi_free_intList_arm
|
|
|
|
#define qapi_free_numberList qapi_free_numberList_arm
|
|
|
|
#define qapi_free_strList qapi_free_strList_arm
|
|
|
|
#define qapi_free_uint16List qapi_free_uint16List_arm
|
|
|
|
#define qapi_free_uint32List qapi_free_uint32List_arm
|
|
|
|
#define qapi_free_uint64List qapi_free_uint64List_arm
|
|
|
|
#define qapi_free_uint8List qapi_free_uint8List_arm
|
|
|
|
#define qbool_destroy_obj qbool_destroy_obj_arm
|
|
|
|
#define qbool_from_int qbool_from_int_arm
|
|
|
|
#define qbool_get_int qbool_get_int_arm
|
|
|
|
#define qbool_type qbool_type_arm
|
|
|
|
#define qbus_create qbus_create_arm
|
|
|
|
#define qbus_create_inplace qbus_create_inplace_arm
|
|
|
|
#define qbus_finalize qbus_finalize_arm
|
|
|
|
#define qbus_initfn qbus_initfn_arm
|
|
|
|
#define qbus_realize qbus_realize_arm
|
|
|
|
#define qdev_create qdev_create_arm
|
|
|
|
#define qdev_get_type qdev_get_type_arm
|
|
|
|
#define qdev_register_types qdev_register_types_arm
|
|
|
|
#define qdev_set_parent_bus qdev_set_parent_bus_arm
|
|
|
|
#define qdev_try_create qdev_try_create_arm
|
|
|
|
#define qdict_add_key qdict_add_key_arm
|
|
|
|
#define qdict_array_split qdict_array_split_arm
|
|
|
|
#define qdict_clone_shallow qdict_clone_shallow_arm
|
|
|
|
#define qdict_del qdict_del_arm
|
|
|
|
#define qdict_destroy_obj qdict_destroy_obj_arm
|
|
|
|
#define qdict_entry_key qdict_entry_key_arm
|
|
|
|
#define qdict_entry_value qdict_entry_value_arm
|
|
|
|
#define qdict_extract_subqdict qdict_extract_subqdict_arm
|
|
|
|
#define qdict_find qdict_find_arm
|
|
|
|
#define qdict_first qdict_first_arm
|
|
|
|
#define qdict_flatten qdict_flatten_arm
|
|
|
|
#define qdict_flatten_qdict qdict_flatten_qdict_arm
|
|
|
|
#define qdict_flatten_qlist qdict_flatten_qlist_arm
|
|
|
|
#define qdict_get qdict_get_arm
|
|
|
|
#define qdict_get_bool qdict_get_bool_arm
|
|
|
|
#define qdict_get_double qdict_get_double_arm
|
|
|
|
#define qdict_get_int qdict_get_int_arm
|
|
|
|
#define qdict_get_obj qdict_get_obj_arm
|
|
|
|
#define qdict_get_qdict qdict_get_qdict_arm
|
|
|
|
#define qdict_get_qlist qdict_get_qlist_arm
|
|
|
|
#define qdict_get_str qdict_get_str_arm
|
|
|
|
#define qdict_get_try_bool qdict_get_try_bool_arm
|
|
|
|
#define qdict_get_try_int qdict_get_try_int_arm
|
|
|
|
#define qdict_get_try_str qdict_get_try_str_arm
|
|
|
|
#define qdict_has_prefixed_entries qdict_has_prefixed_entries_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define qdict_haskey qdict_haskey_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define qdict_iter qdict_iter_arm
|
|
|
|
#define qdict_join qdict_join_arm
|
|
|
|
#define qdict_new qdict_new_arm
|
|
|
|
#define qdict_next qdict_next_arm
|
|
|
|
#define qdict_next_entry qdict_next_entry_arm
|
2018-03-08 14:02:00 +00:00
|
|
|
#define qdict_put_bool qdict_put_bool_arm
|
|
|
|
#define qdict_put_int qdict_put_int_arm
|
|
|
|
#define qdict_put_null qdict_put_null_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define qdict_put_obj qdict_put_obj_arm
|
2018-03-08 14:02:00 +00:00
|
|
|
#define qdict_put_str qdict_put_str_arm
|
2018-03-12 13:38:35 +00:00
|
|
|
#define qdict_rename_keys qdict_rename_keys_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define qdict_size qdict_size_arm
|
|
|
|
#define qdict_type qdict_type_arm
|
|
|
|
#define qemu_clock_get_us qemu_clock_get_us_arm
|
|
|
|
#define qemu_clock_ptr qemu_clock_ptr_arm
|
|
|
|
#define qemu_clocks qemu_clocks_arm
|
|
|
|
#define qemu_get_cpu qemu_get_cpu_arm
|
|
|
|
#define qemu_get_guest_memory_mapping qemu_get_guest_memory_mapping_arm
|
|
|
|
#define qemu_get_guest_simple_memory_mapping qemu_get_guest_simple_memory_mapping_arm
|
|
|
|
#define qemu_get_ram_block qemu_get_ram_block_arm
|
|
|
|
#define qemu_host_page_mask qemu_host_page_mask_arm
|
|
|
|
#define qemu_host_page_size qemu_host_page_size_arm
|
|
|
|
#define qemu_init_vcpu qemu_init_vcpu_arm
|
|
|
|
#define qemu_ld_helpers qemu_ld_helpers_arm
|
|
|
|
#define qemu_log_enabled qemu_log_enabled_arm
|
|
|
|
#define qemu_log_vprintf qemu_log_vprintf_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define qemu_loglevel_mask qemu_loglevel_mask_arm
|
2018-02-24 21:10:07 +00:00
|
|
|
#define qemu_map_ram_ptr qemu_map_ram_ptr_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define qemu_oom_check qemu_oom_check_arm
|
|
|
|
#define qemu_parse_fd qemu_parse_fd_arm
|
|
|
|
#define qemu_ram_addr_from_host qemu_ram_addr_from_host_arm
|
|
|
|
#define qemu_ram_addr_from_host_nofail qemu_ram_addr_from_host_nofail_arm
|
|
|
|
#define qemu_ram_alloc qemu_ram_alloc_arm
|
|
|
|
#define qemu_ram_alloc_from_ptr qemu_ram_alloc_from_ptr_arm
|
2018-02-17 22:02:55 +00:00
|
|
|
#define qemu_ram_alloc_resizeable qemu_ram_alloc_resizeable_arm
|
2018-02-17 22:58:36 +00:00
|
|
|
#define qemu_ram_block_by_name qemu_ram_block_by_name_arm
|
2018-02-17 22:52:30 +00:00
|
|
|
#define qemu_ram_block_from_host qemu_ram_block_from_host_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define qemu_ram_foreach_block qemu_ram_foreach_block_arm
|
|
|
|
#define qemu_ram_free qemu_ram_free_arm
|
2018-02-17 22:52:30 +00:00
|
|
|
#define qemu_ram_get_idstr qemu_ram_get_idstr_arm
|
2018-03-02 18:04:57 +00:00
|
|
|
#define qemu_ram_is_shared qemu_ram_is_shared_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define qemu_ram_ptr_length qemu_ram_ptr_length_arm
|
|
|
|
#define qemu_ram_remap qemu_ram_remap_arm
|
2018-02-17 22:02:55 +00:00
|
|
|
#define qemu_ram_resize qemu_ram_resize_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define qemu_ram_setup_dump qemu_ram_setup_dump_arm
|
|
|
|
#define qemu_ram_unset_idstr qemu_ram_unset_idstr_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define qemu_st_helpers qemu_st_helpers_arm
|
2018-02-15 13:29:50 +00:00
|
|
|
#define qemu_strnlen qemu_strnlen_arm
|
|
|
|
#define qemu_strsep qemu_strsep_arm
|
2018-03-02 14:17:49 +00:00
|
|
|
#define qemu_tcg_configure qemu_tcg_configure_arm
|
2015-08-21 07:04:50 +00:00
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#define qemu_tcg_init_vcpu qemu_tcg_init_vcpu_arm
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#define qemu_try_memalign qemu_try_memalign_arm
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#define qentry_destroy qentry_destroy_arm
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#define qerror_human qerror_human_arm
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#define qerror_report qerror_report_arm
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#define qerror_report_err qerror_report_err_arm
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#define qfloat_destroy_obj qfloat_destroy_obj_arm
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#define qfloat_from_double qfloat_from_double_arm
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#define qfloat_get_double qfloat_get_double_arm
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#define qfloat_type qfloat_type_arm
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#define qint_destroy_obj qint_destroy_obj_arm
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#define qint_from_int qint_from_int_arm
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#define qint_get_int qint_get_int_arm
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#define qint_type qint_type_arm
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2018-03-08 14:02:00 +00:00
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#define qlist_append_bool qlist_append_bool_arm
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#define qlist_append_int qlist_append_int_arm
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#define qlist_append_null qlist_append_null_arm
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2015-08-21 07:04:50 +00:00
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#define qlist_append_obj qlist_append_obj_arm
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2018-03-08 14:02:00 +00:00
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#define qlist_append_str qlist_append_str_arm
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2015-08-21 07:04:50 +00:00
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#define qlist_copy qlist_copy_arm
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#define qlist_copy_elem qlist_copy_elem_arm
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#define qlist_destroy_obj qlist_destroy_obj_arm
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#define qlist_empty qlist_empty_arm
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#define qlist_entry_obj qlist_entry_obj_arm
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#define qlist_first qlist_first_arm
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#define qlist_iter qlist_iter_arm
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#define qlist_new qlist_new_arm
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#define qlist_next qlist_next_arm
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#define qlist_peek qlist_peek_arm
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#define qlist_pop qlist_pop_arm
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#define qlist_size qlist_size_arm
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#define qlist_size_iter qlist_size_iter_arm
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#define qlist_type qlist_type_arm
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2018-03-07 22:14:53 +00:00
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#define qlit_equal_qobject qlit_equal_qobject_arm
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2018-03-20 14:30:13 +00:00
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#define qobject_from_qlit qobject_from_qlit_arm
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2018-03-20 15:09:43 +00:00
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#define qobject_get_try_str qobject_get_try_str_arm
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2018-02-26 20:53:02 +00:00
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#define qobject_input_end_implicit_struct qobject_input_end_implicit_struct_arm
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#define qobject_input_end_list qobject_input_end_list_arm
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#define qobject_input_end_struct qobject_input_end_struct_arm
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#define qobject_input_get_next_type qobject_input_get_next_type_arm
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#define qobject_input_get_object qobject_input_get_object_arm
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#define qobject_input_get_visitor qobject_input_get_visitor_arm
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#define qobject_input_next_list qobject_input_next_list_arm
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#define qobject_input_optional qobject_input_optional_arm
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#define qobject_input_pop qobject_input_pop_arm
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#define qobject_input_push qobject_input_push_arm
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#define qobject_input_start_implicit_struct qobject_input_start_implicit_struct_arm
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#define qobject_input_start_list qobject_input_start_list_arm
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#define qobject_input_start_struct qobject_input_start_struct_arm
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#define qobject_input_type_bool qobject_input_type_bool_arm
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#define qobject_input_type_int qobject_input_type_int_arm
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#define qobject_input_type_number qobject_input_type_number_arm
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#define qobject_input_type_str qobject_input_type_str_arm
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#define qobject_input_visitor_cleanup qobject_input_visitor_cleanup_arm
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#define qobject_input_visitor_new qobject_input_visitor_new_arm
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#define qobject_input_visitor_new_strict qobject_input_visitor_new_strict_arm
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2018-02-27 12:53:17 +00:00
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#define qobject_output_add_obj qobject_output_add_obj_arm
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#define qobject_output_end_list qobject_output_end_list_arm
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#define qobject_output_end_struct qobject_output_end_struct_arm
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#define qobject_output_first qobject_output_first_arm
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#define qobject_output_get_qobject qobject_output_get_qobject_arm
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#define qobject_output_get_visitor qobject_output_get_visitor_arm
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#define qobject_output_last qobject_output_last_arm
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#define qobject_output_next_list qobject_output_next_list_arm
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#define qobject_output_pop qobject_output_pop_arm
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#define qobject_output_push_obj qobject_output_push_obj_arm
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#define qobject_output_start_list qobject_output_start_list_arm
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#define qobject_output_start_struct qobject_output_start_struct_arm
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#define qobject_output_type_bool qobject_output_type_bool_arm
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#define qobject_output_type_int qobject_output_type_int_arm
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#define qobject_output_type_number qobject_output_type_number_arm
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#define qobject_output_type_str qobject_output_type_str_arm
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#define qobject_output_visitor_cleanup qobject_output_visitor_cleanup_arm
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#define qobject_output_visitor_new qobject_output_visitor_new_arm
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2015-08-21 07:04:50 +00:00
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#define qobject_decref qobject_decref_arm
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#define qobject_type qobject_type_arm
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#define qstring_append qstring_append_arm
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#define qstring_append_chr qstring_append_chr_arm
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#define qstring_append_int qstring_append_int_arm
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#define qstring_destroy_obj qstring_destroy_obj_arm
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#define qstring_from_escaped_str qstring_from_escaped_str_arm
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#define qstring_from_str qstring_from_str_arm
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#define qstring_from_substr qstring_from_substr_arm
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#define qstring_get_length qstring_get_length_arm
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#define qstring_get_str qstring_get_str_arm
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2018-03-20 15:07:10 +00:00
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#define qstring_get_try_str qstring_get_try_str_arm
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2015-08-21 07:04:50 +00:00
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#define qstring_new qstring_new_arm
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#define qstring_type qstring_type_arm
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#define ram_block_add ram_block_add_arm
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#define ram_size ram_size_arm
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#define range_compare range_compare_arm
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#define range_covers_byte range_covers_byte_arm
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#define range_get_last range_get_last_arm
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#define range_merge range_merge_arm
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#define ranges_can_merge ranges_can_merge_arm
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#define raw_read raw_read_arm
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#define raw_write raw_write_arm
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#define rcon rcon_arm
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#define read_raw_cp_reg read_raw_cp_reg_arm
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#define recip_estimate recip_estimate_arm
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#define recip_sqrt_estimate recip_sqrt_estimate_arm
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#define register_cp_regs_for_features register_cp_regs_for_features_arm
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#define register_multipage register_multipage_arm
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#define register_subpage register_subpage_arm
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#define register_tm_clones register_tm_clones_arm
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#define register_types_object register_types_object_arm
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#define regnames regnames_arm
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#define render_memory_region render_memory_region_arm
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#define reset_all_temps reset_all_temps_arm
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#define reset_temp reset_temp_arm
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2018-02-26 00:07:14 +00:00
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#define restore_state_to_opc restore_state_to_opc_arm
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#define resume_all_vcpus resume_all_vcpus_arm
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2015-08-21 07:04:50 +00:00
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#define rol32 rol32_arm
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#define rol64 rol64_arm
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#define ror32 ror32_arm
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#define ror64 ror64_arm
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#define roundAndPackFloat128 roundAndPackFloat128_arm
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#define roundAndPackFloat16 roundAndPackFloat16_arm
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#define roundAndPackFloat32 roundAndPackFloat32_arm
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#define roundAndPackFloat64 roundAndPackFloat64_arm
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#define roundAndPackFloatx80 roundAndPackFloatx80_arm
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#define roundAndPackInt32 roundAndPackInt32_arm
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#define roundAndPackInt64 roundAndPackInt64_arm
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#define roundAndPackUint64 roundAndPackUint64_arm
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#define round_to_inf round_to_inf_arm
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#define run_on_cpu run_on_cpu_arm
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#define s0 s0_arm
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#define s1 s1_arm
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#define sa1100_initfn sa1100_initfn_arm
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#define sa1110_initfn sa1110_initfn_arm
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#define save_globals save_globals_arm
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#define scr_write scr_write_arm
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#define sctlr_write sctlr_write_arm
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#define set_bit set_bit_arm
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#define set_bits set_bits_arm
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#define set_default_nan_mode set_default_nan_mode_arm
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#define set_feature set_feature_arm
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#define set_float_detect_tininess set_float_detect_tininess_arm
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#define set_float_exception_flags set_float_exception_flags_arm
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#define set_float_rounding_mode set_float_rounding_mode_arm
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#define set_flush_inputs_to_zero set_flush_inputs_to_zero_arm
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#define set_flush_to_zero set_flush_to_zero_arm
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2018-02-26 16:54:41 +00:00
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#define set_preferred_target_page_bits set_preferred_target_page_bits_arm
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2015-08-21 07:04:50 +00:00
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#define set_swi_errno set_swi_errno_arm
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#define sextract32 sextract32_arm
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#define sextract64 sextract64_arm
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#define shift128ExtraRightJamming shift128ExtraRightJamming_arm
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#define shift128Right shift128Right_arm
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#define shift128RightJamming shift128RightJamming_arm
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#define shift32RightJamming shift32RightJamming_arm
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#define shift64ExtraRightJamming shift64ExtraRightJamming_arm
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#define shift64RightJamming shift64RightJamming_arm
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#define shifter_out_im shifter_out_im_arm
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#define shortShift128Left shortShift128Left_arm
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#define shortShift192Left shortShift192Left_arm
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2018-03-06 17:19:54 +00:00
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#define simd_desc simd_desc_arm
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2015-08-21 07:04:50 +00:00
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#define simple_mpu_ap_bits simple_mpu_ap_bits_arm
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#define size_code_gen_buffer size_code_gen_buffer_arm
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#define softmmu_lock_user softmmu_lock_user_arm
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#define softmmu_lock_user_string softmmu_lock_user_string_arm
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#define softmmu_tget32 softmmu_tget32_arm
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#define softmmu_tget8 softmmu_tget8_arm
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#define softmmu_tput32 softmmu_tput32_arm
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#define softmmu_unlock_user softmmu_unlock_user_arm
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#define sort_constraints sort_constraints_arm
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#define sp_el0_access sp_el0_access_arm
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#define spsel_read spsel_read_arm
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#define spsel_write spsel_write_arm
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#define start_list start_list_arm
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#define stb_p stb_p_arm
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#define stb_phys stb_phys_arm
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2018-03-01 15:10:15 +00:00
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#define stb_phys_cached stb_phys_cached_arm
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2015-08-21 07:04:50 +00:00
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#define stl_be_p stl_be_p_arm
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#define stl_be_phys stl_be_phys_arm
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2018-03-01 15:10:15 +00:00
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#define stl_be_phys_cached stl_be_phys_cached_arm
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2015-08-21 07:04:50 +00:00
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#define stl_he_p stl_he_p_arm
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#define stl_le_p stl_le_p_arm
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#define stl_le_phys stl_le_phys_arm
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2018-03-01 15:10:15 +00:00
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#define stl_le_phys_cached stl_le_phys_cached_arm
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2015-08-21 07:04:50 +00:00
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#define stl_phys stl_phys_arm
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2018-03-01 15:10:15 +00:00
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#define stl_phys_cached stl_phys_cached_arm
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2015-08-21 07:04:50 +00:00
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#define stl_phys_internal stl_phys_internal_arm
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#define stl_phys_notdirty stl_phys_notdirty_arm
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2018-03-01 15:10:15 +00:00
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#define stl_phys_notdirty_cached stl_phys_notdirty_cached_arm
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2015-08-21 07:04:50 +00:00
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#define store_cpu_offset store_cpu_offset_arm
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#define store_reg store_reg_arm
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#define store_reg_bx store_reg_bx_arm
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#define store_reg_from_load store_reg_from_load_arm
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#define stq_be_p stq_be_p_arm
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#define stq_be_phys stq_be_phys_arm
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2018-03-01 15:10:15 +00:00
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#define stq_be_phys_cached stq_be_phys_cached_arm
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2015-08-21 07:04:50 +00:00
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#define stq_he_p stq_he_p_arm
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#define stq_le_p stq_le_p_arm
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#define stq_le_phys stq_le_phys_arm
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2018-03-01 15:10:15 +00:00
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#define stq_le_phys_cached stq_le_phys_cached_arm
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2015-08-21 07:04:50 +00:00
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#define stq_phys stq_phys_arm
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2018-03-01 15:10:15 +00:00
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#define stq_phys_cached stq_phys_cached_arm
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2015-08-21 07:04:50 +00:00
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#define string_input_get_visitor string_input_get_visitor_arm
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#define string_input_visitor_cleanup string_input_visitor_cleanup_arm
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#define string_input_visitor_new string_input_visitor_new_arm
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2018-02-15 13:29:50 +00:00
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#define stristart stristart_arm
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2015-08-21 07:04:50 +00:00
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#define strongarm_cp_reginfo strongarm_cp_reginfo_arm
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2018-02-15 13:29:50 +00:00
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#define strpadcpy strpadcpy_arm
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2015-08-21 07:04:50 +00:00
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#define strstart strstart_arm
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#define stw_be_p stw_be_p_arm
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#define stw_be_phys stw_be_phys_arm
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2018-03-01 18:03:39 +00:00
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#define stw_be_phys_cached stw_be_phys_cached_arm
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2015-08-21 07:04:50 +00:00
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#define stw_he_p stw_he_p_arm
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#define stw_le_p stw_le_p_arm
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#define stw_le_phys stw_le_phys_arm
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2018-03-01 15:10:15 +00:00
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#define stw_le_phys_cached stw_le_phys_cached_arm
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2015-08-21 07:04:50 +00:00
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#define stw_phys stw_phys_arm
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2018-03-01 15:10:15 +00:00
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#define stw_phys_cached stw_phys_cached_arm
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2015-08-21 07:04:50 +00:00
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#define stw_phys_internal stw_phys_internal_arm
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#define sub128 sub128_arm
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#define sub16_sat sub16_sat_arm
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#define sub16_usat sub16_usat_arm
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#define sub192 sub192_arm
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#define sub8_sat sub8_sat_arm
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#define sub8_usat sub8_usat_arm
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#define subFloat128Sigs subFloat128Sigs_arm
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#define subFloat32Sigs subFloat32Sigs_arm
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#define subFloat64Sigs subFloat64Sigs_arm
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#define subFloatx80Sigs subFloatx80Sigs_arm
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#define subpage_accepts subpage_accepts_arm
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#define subpage_init subpage_init_arm
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#define subpage_ops subpage_ops_arm
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#define subpage_read subpage_read_arm
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#define subpage_register subpage_register_arm
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#define subpage_write subpage_write_arm
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#define suffix_mul suffix_mul_arm
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#define swap_commutative swap_commutative_arm
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#define swap_commutative2 swap_commutative2_arm
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#define switch_mode switch_mode_arm
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#define syn_aa32_bkpt syn_aa32_bkpt_arm
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#define syn_aa32_hvc syn_aa32_hvc_arm
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#define syn_aa32_smc syn_aa32_smc_arm
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#define syn_aa32_svc syn_aa32_svc_arm
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#define syn_breakpoint syn_breakpoint_arm
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#define syn_cp14_rrt_trap syn_cp14_rrt_trap_arm
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#define syn_cp14_rt_trap syn_cp14_rt_trap_arm
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#define syn_cp15_rrt_trap syn_cp15_rrt_trap_arm
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#define syn_cp15_rt_trap syn_cp15_rt_trap_arm
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#define syn_data_abort syn_data_abort_arm
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#define syn_fp_access_trap syn_fp_access_trap_arm
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#define syn_insn_abort syn_insn_abort_arm
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#define syn_swstep syn_swstep_arm
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#define syn_uncategorized syn_uncategorized_arm
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#define syn_watchpoint syn_watchpoint_arm
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2018-02-26 00:07:14 +00:00
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#define sync_globals sync_globals_arm
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2015-08-21 07:04:50 +00:00
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#define syscall_err syscall_err_arm
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#define system_bus_class_init system_bus_class_init_arm
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#define system_bus_info system_bus_info_arm
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#define t2ee_cp_reginfo t2ee_cp_reginfo_arm
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|
#define table_logic_cc table_logic_cc_arm
|
2018-02-12 14:37:39 +00:00
|
|
|
#define target_el_table target_el_table_arm
|
2015-08-21 07:04:50 +00:00
|
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|
#define target_parse_constraint target_parse_constraint_arm
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#define target_words_bigendian target_words_bigendian_arm
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#define tb_alloc tb_alloc_arm
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#define tb_alloc_page tb_alloc_page_arm
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#define tb_check_watchpoint tb_check_watchpoint_arm
|
2018-02-26 00:07:14 +00:00
|
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|
#define tb_cleanup tb_cleanup_arm
|
2015-08-21 07:04:50 +00:00
|
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|
#define tb_find_fast tb_find_fast_arm
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#define tb_find_pc tb_find_pc_arm
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#define tb_find_slow tb_find_slow_arm
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#define tb_flush tb_flush_arm
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#define tb_flush_jmp_cache tb_flush_jmp_cache_arm
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#define tb_free tb_free_arm
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|
#define tb_gen_code tb_gen_code_arm
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|
#define tb_hash_remove tb_hash_remove_arm
|
2018-03-03 01:56:29 +00:00
|
|
|
#define tb_htable_lookup tb_htable_lookup_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tb_invalidate_phys_addr tb_invalidate_phys_addr_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define tb_invalidate_phys_page_fast tb_invalidate_phys_page_fast_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tb_invalidate_phys_page_range tb_invalidate_phys_page_range_arm
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|
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#define tb_invalidate_phys_range tb_invalidate_phys_range_arm
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|
#define tb_jmp_cache_hash_func tb_jmp_cache_hash_func_arm
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#define tb_jmp_cache_hash_page tb_jmp_cache_hash_page_arm
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|
#define tb_jmp_remove tb_jmp_remove_arm
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|
#define tb_link_page tb_link_page_arm
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|
#define tb_page_remove tb_page_remove_arm
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#define tb_phys_hash_func tb_phys_hash_func_arm
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#define tb_phys_invalidate tb_phys_invalidate_arm
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#define tb_reset_jump tb_reset_jump_arm
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#define tb_set_jmp_target tb_set_jmp_target_arm
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#define tcg_accel_class_init tcg_accel_class_init_arm
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#define tcg_accel_type tcg_accel_type_arm
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#define tcg_add_param_i32 tcg_add_param_i32_arm
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#define tcg_add_param_i64 tcg_add_param_i64_arm
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|
#define tcg_add_target_add_op_defs tcg_add_target_add_op_defs_arm
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|
|
#define tcg_allowed tcg_allowed_arm
|
2019-05-16 19:03:12 +00:00
|
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|
#define tcg_assert_listed_vecop tcg_assert_listed_vecop_arm
|
2018-03-06 21:20:28 +00:00
|
|
|
#define tcg_can_emit_vec_op tcg_can_emit_vec_op_arm
|
2019-05-16 19:03:12 +00:00
|
|
|
#define tcg_can_emit_vecop_list tcg_can_emit_vecop_list_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tcg_canonicalize_memop tcg_canonicalize_memop_arm
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|
|
#define tcg_commit tcg_commit_arm
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|
|
#define tcg_cond_to_jcc tcg_cond_to_jcc_arm
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|
|
#define tcg_const_i32 tcg_const_i32_arm
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|
|
#define tcg_const_i64 tcg_const_i64_arm
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|
|
#define tcg_const_local_i32 tcg_const_local_i32_arm
|
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|
|
#define tcg_const_local_i64 tcg_const_local_i64_arm
|
2018-03-06 16:49:50 +00:00
|
|
|
#define tcg_const_ones_vec tcg_const_ones_vec_arm
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|
#define tcg_const_ones_vec_matching tcg_const_ones_vec_matching_arm
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|
#define tcg_const_zeros_vec tcg_const_zeros_vec_arm
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|
|
#define tcg_const_zeros_vec_matching tcg_const_zeros_vec_matching_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define tcg_constant_folding tcg_constant_folding_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tcg_context_init tcg_context_init_arm
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|
#define tcg_cpu_exec tcg_cpu_exec_arm
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|
#define tcg_current_code_size tcg_current_code_size_arm
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|
|
|
#define tcg_dump_info tcg_dump_info_arm
|
|
|
|
#define tcg_dump_ops tcg_dump_ops_arm
|
2018-03-05 21:01:13 +00:00
|
|
|
#define tcg_emit_op tcg_emit_op_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define tcg_enabled tcg_enabled_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tcg_exec_all tcg_exec_all_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define tcg_exec_init tcg_exec_init_arm
|
2018-03-06 17:19:54 +00:00
|
|
|
#define tcg_expand_vec_op tcg_expand_vec_op_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tcg_find_helper tcg_find_helper_arm
|
2018-03-04 02:22:27 +00:00
|
|
|
#define tcg_flush_softmmu_tlb tcg_flush_softmmu_tlb_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tcg_func_start tcg_func_start_arm
|
|
|
|
#define tcg_gen_abs_i32 tcg_gen_abs_i32_arm
|
2019-05-16 20:24:21 +00:00
|
|
|
#define tcg_gen_abs_i64 tcg_gen_abs_i64_arm
|
|
|
|
#define tcg_gen_abs_vec tcg_gen_abs_vec_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tcg_gen_add2_i32 tcg_gen_add2_i32_arm
|
2018-02-08 20:19:28 +00:00
|
|
|
#define tcg_gen_add2_i64 tcg_gen_add2_i64_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tcg_gen_add_i32 tcg_gen_add_i32_arm
|
|
|
|
#define tcg_gen_add_i64 tcg_gen_add_i64_arm
|
2018-03-06 16:49:50 +00:00
|
|
|
#define tcg_gen_add_vec tcg_gen_add_vec_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tcg_gen_addi_i32 tcg_gen_addi_i32_arm
|
|
|
|
#define tcg_gen_addi_i64 tcg_gen_addi_i64_arm
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|
|
|
#define tcg_gen_and_i32 tcg_gen_and_i32_arm
|
|
|
|
#define tcg_gen_and_i64 tcg_gen_and_i64_arm
|
2018-03-06 16:49:50 +00:00
|
|
|
#define tcg_gen_and_vec tcg_gen_and_vec_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define tcg_gen_andc_i32 tcg_gen_andc_i32_arm
|
|
|
|
#define tcg_gen_andc_i64 tcg_gen_andc_i64_arm
|
2018-03-06 16:49:50 +00:00
|
|
|
#define tcg_gen_andc_vec tcg_gen_andc_vec_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tcg_gen_andi_i32 tcg_gen_andi_i32_arm
|
|
|
|
#define tcg_gen_andi_i64 tcg_gen_andi_i64_arm
|
2018-02-27 17:47:33 +00:00
|
|
|
#define tcg_gen_atomic_add_fetch_i32 tcg_gen_atomic_add_fetch_i32_arm
|
|
|
|
#define tcg_gen_atomic_add_fetch_i64 tcg_gen_atomic_add_fetch_i64_arm
|
|
|
|
#define tcg_gen_atomic_and_fetch_i32 tcg_gen_atomic_and_fetch_i32_arm
|
|
|
|
#define tcg_gen_atomic_and_fetch_i64 tcg_gen_atomic_and_fetch_i64_arm
|
|
|
|
#define tcg_gen_atomic_cmpxchg_i32 tcg_gen_atomic_cmpxchg_i32_arm
|
|
|
|
#define tcg_gen_atomic_cmpxchg_i64 tcg_gen_atomic_cmpxchg_i64_arm
|
|
|
|
#define tcg_gen_atomic_fetch_add_i32 tcg_gen_atomic_fetch_add_i32_arm
|
|
|
|
#define tcg_gen_atomic_fetch_add_i64 tcg_gen_atomic_fetch_add_i64_arm
|
|
|
|
#define tcg_gen_atomic_fetch_and_i32 tcg_gen_atomic_fetch_and_i32_arm
|
|
|
|
#define tcg_gen_atomic_fetch_and_i64 tcg_gen_atomic_fetch_and_i64_arm
|
|
|
|
#define tcg_gen_atomic_fetch_or_i32 tcg_gen_atomic_fetch_or_i32_arm
|
|
|
|
#define tcg_gen_atomic_fetch_or_i64 tcg_gen_atomic_fetch_or_i64_arm
|
2018-05-14 11:37:05 +00:00
|
|
|
#define tcg_gen_atomic_fetch_smax_i32 tcg_gen_atomic_fetch_smax_i32_arm
|
|
|
|
#define tcg_gen_atomic_fetch_smax_i64 tcg_gen_atomic_fetch_smax_i64_arm
|
|
|
|
#define tcg_gen_atomic_fetch_smin_i32 tcg_gen_atomic_fetch_smin_i32_arm
|
|
|
|
#define tcg_gen_atomic_fetch_smin_i64 tcg_gen_atomic_fetch_smin_i64_arm
|
|
|
|
#define tcg_gen_atomic_fetch_umax_i32 tcg_gen_atomic_fetch_umax_i32_arm
|
|
|
|
#define tcg_gen_atomic_fetch_umax_i64 tcg_gen_atomic_fetch_umax_i64_arm
|
|
|
|
#define tcg_gen_atomic_fetch_umin_i32 tcg_gen_atomic_fetch_umin_i32_arm
|
|
|
|
#define tcg_gen_atomic_fetch_umin_i64 tcg_gen_atomic_fetch_umin_i64_arm
|
2018-02-27 17:47:33 +00:00
|
|
|
#define tcg_gen_atomic_fetch_xor_i32 tcg_gen_atomic_fetch_xor_i32_arm
|
|
|
|
#define tcg_gen_atomic_fetch_xor_i64 tcg_gen_atomic_fetch_xor_i64_arm
|
|
|
|
#define tcg_gen_atomic_or_fetch_i32 tcg_gen_atomic_or_fetch_i32_arm
|
|
|
|
#define tcg_gen_atomic_or_fetch_i64 tcg_gen_atomic_or_fetch_i64_arm
|
2018-05-14 11:37:05 +00:00
|
|
|
#define tcg_gen_atomic_smax_fetch_i32 tcg_gen_atomic_smax_fetch_i32_arm
|
|
|
|
#define tcg_gen_atomic_smax_fetch_i64 tcg_gen_atomic_smax_fetch_i64_arm
|
|
|
|
#define tcg_gen_atomic_smin_fetch_i32 tcg_gen_atomic_smin_fetch_i32_arm
|
|
|
|
#define tcg_gen_atomic_smin_fetch_i64 tcg_gen_atomic_smin_fetch_i64_arm
|
|
|
|
#define tcg_gen_atomic_umax_fetch_i32 tcg_gen_atomic_umax_fetch_i32_arm
|
|
|
|
#define tcg_gen_atomic_umax_fetch_i64 tcg_gen_atomic_umax_fetch_i64_arm
|
|
|
|
#define tcg_gen_atomic_umin_fetch_i32 tcg_gen_atomic_umin_fetch_i32_arm
|
|
|
|
#define tcg_gen_atomic_umin_fetch_i64 tcg_gen_atomic_umin_fetch_i64_arm
|
2018-02-27 17:47:33 +00:00
|
|
|
#define tcg_gen_atomic_xchg_i32 tcg_gen_atomic_xchg_i32_arm
|
|
|
|
#define tcg_gen_atomic_xchg_i64 tcg_gen_atomic_xchg_i64_arm
|
|
|
|
#define tcg_gen_atomic_xor_fetch_i32 tcg_gen_atomic_xor_fetch_i32_arm
|
|
|
|
#define tcg_gen_atomic_xor_fetch_i64 tcg_gen_atomic_xor_fetch_i64_arm
|
2019-05-24 22:14:31 +00:00
|
|
|
#define tcg_gen_bitsel_vec tcg_gen_bitsel_vec_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tcg_gen_br tcg_gen_br_arm
|
|
|
|
#define tcg_gen_brcond_i32 tcg_gen_brcond_i32_arm
|
|
|
|
#define tcg_gen_brcond_i64 tcg_gen_brcond_i64_arm
|
|
|
|
#define tcg_gen_brcondi_i32 tcg_gen_brcondi_i32_arm
|
2018-02-08 20:19:28 +00:00
|
|
|
#define tcg_gen_brcondi_i64 tcg_gen_brcondi_i64_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tcg_gen_bswap16_i32 tcg_gen_bswap16_i32_arm
|
2018-02-08 20:19:28 +00:00
|
|
|
#define tcg_gen_bswap16_i64 tcg_gen_bswap16_i64_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tcg_gen_bswap32_i32 tcg_gen_bswap32_i32_arm
|
2018-02-08 20:19:28 +00:00
|
|
|
#define tcg_gen_bswap32_i64 tcg_gen_bswap32_i64_arm
|
|
|
|
#define tcg_gen_bswap64_i64 tcg_gen_bswap64_i64_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tcg_gen_callN tcg_gen_callN_arm
|
2018-03-01 23:12:18 +00:00
|
|
|
#define tcg_gen_clrsb_i32 tcg_gen_clrsb_i32_arm
|
|
|
|
#define tcg_gen_clrsb_i64 tcg_gen_clrsb_i64_arm
|
2018-03-01 20:53:35 +00:00
|
|
|
#define tcg_gen_clz_i32 tcg_gen_clz_i32_arm
|
|
|
|
#define tcg_gen_clz_i64 tcg_gen_clz_i64_arm
|
|
|
|
#define tcg_gen_clzi_i32 tcg_gen_clzi_i32_arm
|
|
|
|
#define tcg_gen_clzi_i64 tcg_gen_clzi_i64_arm
|
2018-03-06 19:07:42 +00:00
|
|
|
#define tcg_gen_cmp_vec tcg_gen_cmp_vec_arm
|
2019-05-24 22:21:10 +00:00
|
|
|
#define tcg_gen_cmpsel_vec tcg_gen_cmpsel_vec_arm
|
2018-03-01 23:21:05 +00:00
|
|
|
#define tcg_gen_ctpop_i32 tcg_gen_ctpop_i32_arm
|
|
|
|
#define tcg_gen_ctpop_i64 tcg_gen_ctpop_i64_arm
|
2018-03-01 20:53:35 +00:00
|
|
|
#define tcg_gen_ctz_i32 tcg_gen_ctz_i32_arm
|
|
|
|
#define tcg_gen_ctz_i64 tcg_gen_ctz_i64_arm
|
|
|
|
#define tcg_gen_ctzi_i32 tcg_gen_ctzi_i32_arm
|
|
|
|
#define tcg_gen_ctzi_i64 tcg_gen_ctzi_i64_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tcg_gen_code tcg_gen_code_arm
|
|
|
|
#define tcg_gen_concat_i32_i64 tcg_gen_concat_i32_i64_arm
|
|
|
|
#define tcg_gen_deposit_i32 tcg_gen_deposit_i32_arm
|
2018-02-08 20:19:28 +00:00
|
|
|
#define tcg_gen_deposit_i64 tcg_gen_deposit_i64_arm
|
2018-03-01 18:28:18 +00:00
|
|
|
#define tcg_gen_deposit_z_i32 tcg_gen_deposit_z_i32_arm
|
|
|
|
#define tcg_gen_deposit_z_i64 tcg_gen_deposit_z_i64_arm
|
2018-02-08 20:19:28 +00:00
|
|
|
#define tcg_gen_discard_i64 tcg_gen_discard_i64_arm
|
|
|
|
#define tcg_gen_div_i32 tcg_gen_div_i32_arm
|
|
|
|
#define tcg_gen_div_i64 tcg_gen_div_i64_arm
|
|
|
|
#define tcg_gen_divu_i32 tcg_gen_divu_i32_arm
|
|
|
|
#define tcg_gen_divu_i64 tcg_gen_divu_i64_arm
|
2018-03-06 16:49:50 +00:00
|
|
|
#define tcg_gen_dup8i_vec tcg_gen_dup8i_vec_arm
|
|
|
|
#define tcg_gen_dup16i_vec tcg_gen_dup16i_vec_arm
|
|
|
|
#define tcg_gen_dup32i_vec tcg_gen_dup32i_vec_arm
|
|
|
|
#define tcg_gen_dup64i_vec tcg_gen_dup64i_vec_arm
|
2018-03-06 17:19:54 +00:00
|
|
|
#define tcg_gen_dupi_vec tcg_gen_dupi_vec_arm
|
tcg: Add INDEX_op_dupm_vec
Allow the backend to expand dup from memory directly, instead of
forcing the value into a temp first. This is especially important
if integer/vector register moves do not exist.
Note that officially tcg_out_dupm_vec is allowed to fail.
If it did, we could fix this up relatively easily:
VECE == 32/64:
Load the value into a vector register, then dup.
Both of these must work.
VECE == 8/16:
If the value happens to be at an offset such that an aligned
load would place the desired value in the least significant
end of the register, go ahead and load w/garbage in high bits.
Load the value w/INDEX_op_ld{8,16}_i32.
Attempt a move directly to vector reg, which may fail.
Store the value into the backing store for OTS.
Load the value into the vector reg w/TCG_TYPE_I32, which must work.
Duplicate from the vector reg into itself, which must work.
All of which is well and good, except that all supported
hosts can support dupm for all vece, so all of the failure
paths would be dead code and untestable.
Backports commit 37ee55a081b7863ffab2151068dd1b2f11376914 from qemu
2019-05-16 19:37:57 +00:00
|
|
|
#define tcg_gen_dupm_vec tcg_gen_dupm_vec_arm
|
2018-03-06 16:49:50 +00:00
|
|
|
#define tcg_gen_dup_i32_vec tcg_gen_dup_i32_vec_arm
|
|
|
|
#define tcg_gen_dup_i64_vec tcg_gen_dup_i64_vec_arm
|
tcg: Add INDEX_op_dupm_vec
Allow the backend to expand dup from memory directly, instead of
forcing the value into a temp first. This is especially important
if integer/vector register moves do not exist.
Note that officially tcg_out_dupm_vec is allowed to fail.
If it did, we could fix this up relatively easily:
VECE == 32/64:
Load the value into a vector register, then dup.
Both of these must work.
VECE == 8/16:
If the value happens to be at an offset such that an aligned
load would place the desired value in the least significant
end of the register, go ahead and load w/garbage in high bits.
Load the value w/INDEX_op_ld{8,16}_i32.
Attempt a move directly to vector reg, which may fail.
Store the value into the backing store for OTS.
Load the value into the vector reg w/TCG_TYPE_I32, which must work.
Duplicate from the vector reg into itself, which must work.
All of which is well and good, except that all supported
hosts can support dupm for all vece, so all of the failure
paths would be dead code and untestable.
Backports commit 37ee55a081b7863ffab2151068dd1b2f11376914 from qemu
2019-05-16 19:37:57 +00:00
|
|
|
#define tcg_gen_dup_mem_vec tcg_gen_dup_mem_vec_arm
|
2018-02-08 20:19:28 +00:00
|
|
|
#define tcg_gen_eqv_i32 tcg_gen_eqv_i32_arm
|
|
|
|
#define tcg_gen_eqv_i64 tcg_gen_eqv_i64_arm
|
2019-01-29 20:56:03 +00:00
|
|
|
#define tcg_gen_eqv_vec tcg_gen_eqv_vec_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tcg_gen_exit_tb tcg_gen_exit_tb_arm
|
|
|
|
#define tcg_gen_ext16s_i32 tcg_gen_ext16s_i32_arm
|
2018-02-08 20:19:28 +00:00
|
|
|
#define tcg_gen_ext16s_i64 tcg_gen_ext16s_i64_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tcg_gen_ext16u_i32 tcg_gen_ext16u_i32_arm
|
2018-02-08 20:19:28 +00:00
|
|
|
#define tcg_gen_ext16u_i64 tcg_gen_ext16u_i64_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tcg_gen_ext32s_i64 tcg_gen_ext32s_i64_arm
|
|
|
|
#define tcg_gen_ext32u_i64 tcg_gen_ext32u_i64_arm
|
|
|
|
#define tcg_gen_ext8s_i32 tcg_gen_ext8s_i32_arm
|
2018-02-08 20:19:28 +00:00
|
|
|
#define tcg_gen_ext8s_i64 tcg_gen_ext8s_i64_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tcg_gen_ext8u_i32 tcg_gen_ext8u_i32_arm
|
2018-02-08 20:19:28 +00:00
|
|
|
#define tcg_gen_ext8u_i64 tcg_gen_ext8u_i64_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tcg_gen_ext_i32_i64 tcg_gen_ext_i32_i64_arm
|
2018-02-08 20:19:28 +00:00
|
|
|
#define tcg_gen_extr32_i64 tcg_gen_extr32_i64_arm
|
|
|
|
#define tcg_gen_extr_i64_i32 tcg_gen_extr_i64_i32_arm
|
2018-03-01 18:13:49 +00:00
|
|
|
#define tcg_gen_extract_i32 tcg_gen_extract_i32_arm
|
|
|
|
#define tcg_gen_extract_i64 tcg_gen_extract_i64_arm
|
2019-04-30 13:20:02 +00:00
|
|
|
#define tcg_gen_extract2_i32 tcg_gen_extract2_i32_arm
|
|
|
|
#define tcg_gen_extract2_i64 tcg_gen_extract2_i64_arm
|
2018-02-11 03:57:27 +00:00
|
|
|
#define tcg_gen_extrh_i64_i32 tcg_gen_extrh_i64_i32_arm
|
|
|
|
#define tcg_gen_extrl_i64_i32 tcg_gen_extrl_i64_i32_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tcg_gen_extu_i32_i64 tcg_gen_extu_i32_i64_arm
|
|
|
|
#define tcg_gen_goto_tb tcg_gen_goto_tb_arm
|
2018-03-06 17:19:54 +00:00
|
|
|
#define tcg_gen_gvec_2 tcg_gen_gvec_2_arm
|
2018-03-06 18:45:25 +00:00
|
|
|
#define tcg_gen_gvec_2i tcg_gen_gvec_2i_arm
|
2018-03-06 19:54:25 +00:00
|
|
|
#define tcg_gen_gvec_2i_ool tcg_gen_gvec_2i_ool_arm
|
|
|
|
#define tcg_gen_gvec_2s tcg_gen_gvec_2s_arm
|
2018-03-06 17:19:54 +00:00
|
|
|
#define tcg_gen_gvec_2_ool tcg_gen_gvec_2_ool_arm
|
|
|
|
#define tcg_gen_gvec_2_ptr tcg_gen_gvec_2_ptr_arm
|
|
|
|
#define tcg_gen_gvec_3 tcg_gen_gvec_3_arm
|
2019-05-16 18:26:32 +00:00
|
|
|
#define tcg_gen_gvec_3i tcg_gen_gvec_3i_arm
|
2018-03-06 17:19:54 +00:00
|
|
|
#define tcg_gen_gvec_3_ool tcg_gen_gvec_3_ool_arm
|
|
|
|
#define tcg_gen_gvec_3_ptr tcg_gen_gvec_3_ptr_arm
|
|
|
|
#define tcg_gen_gvec_4 tcg_gen_gvec_4_arm
|
|
|
|
#define tcg_gen_gvec_4_ool tcg_gen_gvec_4_ool_arm
|
|
|
|
#define tcg_gen_gvec_4_ptr tcg_gen_gvec_4_ptr_arm
|
|
|
|
#define tcg_gen_gvec_5_ool tcg_gen_gvec_5_ool_arm
|
2019-05-16 20:33:39 +00:00
|
|
|
#define tcg_gen_gvec_abs tcg_gen_gvec_abs_arm
|
2018-03-06 17:19:54 +00:00
|
|
|
#define tcg_gen_gvec_add tcg_gen_gvec_add_arm
|
2018-03-06 19:54:25 +00:00
|
|
|
#define tcg_gen_gvec_addi tcg_gen_gvec_addi_arm
|
|
|
|
#define tcg_gen_gvec_adds tcg_gen_gvec_adds_arm
|
|
|
|
#define tcg_gen_gvec_adds8 tcg_gen_gvec_adds8_arm
|
|
|
|
#define tcg_gen_gvec_adds16 tcg_gen_gvec_adds16_arm
|
|
|
|
#define tcg_gen_gvec_adds32 tcg_gen_gvec_adds32_arm
|
|
|
|
#define tcg_gen_gvec_adds64 tcg_gen_gvec_adds64_arm
|
2018-03-06 17:19:54 +00:00
|
|
|
#define tcg_gen_gvec_and tcg_gen_gvec_and_arm
|
|
|
|
#define tcg_gen_gvec_andc tcg_gen_gvec_andc_arm
|
2018-03-06 19:54:25 +00:00
|
|
|
#define tcg_gen_gvec_andi tcg_gen_gvec_andi_arm
|
|
|
|
#define tcg_gen_gvec_ands tcg_gen_gvec_ands_arm
|
2019-05-24 22:14:31 +00:00
|
|
|
#define tcg_gen_gvec_bitsel tcg_gen_gvec_bitsel_arm
|
2018-03-06 19:07:42 +00:00
|
|
|
#define tcg_gen_gvec_cmp tcg_gen_gvec_cmp_arm
|
2018-03-06 17:19:54 +00:00
|
|
|
#define tcg_gen_gvec_dup8i tcg_gen_gvec_dup8i_arm
|
|
|
|
#define tcg_gen_gvec_dup16i tcg_gen_gvec_dup16i_arm
|
|
|
|
#define tcg_gen_gvec_dup32i tcg_gen_gvec_dup32i_arm
|
|
|
|
#define tcg_gen_gvec_dup64i tcg_gen_gvec_dup64i_arm
|
|
|
|
#define tcg_gen_gvec_dup_i32 tcg_gen_gvec_dup_i32_arm
|
|
|
|
#define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_arm
|
|
|
|
#define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_arm
|
2019-01-29 20:56:03 +00:00
|
|
|
#define tcg_gen_gvec_eqv tcg_gen_gvec_eqv_arm
|
2018-03-06 17:19:54 +00:00
|
|
|
#define tcg_gen_gvec_mov tcg_gen_gvec_mov_arm
|
2018-03-06 19:36:48 +00:00
|
|
|
#define tcg_gen_gvec_mul tcg_gen_gvec_mul_arm
|
2018-03-06 19:54:25 +00:00
|
|
|
#define tcg_gen_gvec_muli tcg_gen_gvec_muli_arm
|
|
|
|
#define tcg_gen_gvec_muls tcg_gen_gvec_muls_arm
|
|
|
|
#define tcg_gen_gvec_muls8 tcg_gen_gvec_muls8_arm
|
|
|
|
#define tcg_gen_gvec_muls16 tcg_gen_gvec_muls16_arm
|
|
|
|
#define tcg_gen_gvec_muls32 tcg_gen_gvec_muls32_arm
|
|
|
|
#define tcg_gen_gvec_muls64 tcg_gen_gvec_muls64_arm
|
2019-01-29 20:56:03 +00:00
|
|
|
#define tcg_gen_gvec_nand tcg_gen_gvec_nand_arm
|
2018-03-06 17:19:54 +00:00
|
|
|
#define tcg_gen_gvec_neg tcg_gen_gvec_neg_arm
|
2019-01-29 20:56:03 +00:00
|
|
|
#define tcg_gen_gvec_nor tcg_gen_gvec_nor_arm
|
2018-03-06 17:19:54 +00:00
|
|
|
#define tcg_gen_gvec_not tcg_gen_gvec_not_arm
|
|
|
|
#define tcg_gen_gvec_or tcg_gen_gvec_or_arm
|
|
|
|
#define tcg_gen_gvec_orc tcg_gen_gvec_orc_arm
|
2018-03-06 19:54:25 +00:00
|
|
|
#define tcg_gen_gvec_ori tcg_gen_gvec_ori_arm
|
|
|
|
#define tcg_gen_gvec_ors tcg_gen_gvec_ors_arm
|
2019-05-16 19:47:43 +00:00
|
|
|
#define tcg_gen_gvec_sar8v tcg_gen_gvec_sar8v_arm
|
|
|
|
#define tcg_gen_gvec_sar16v tcg_gen_gvec_sar16v_arm
|
|
|
|
#define tcg_gen_gvec_sar32v tcg_gen_gvec_sar32v_arm
|
|
|
|
#define tcg_gen_gvec_sar64v tcg_gen_gvec_sar64v_arm
|
2018-03-06 18:45:25 +00:00
|
|
|
#define tcg_gen_gvec_sari tcg_gen_gvec_sari_arm
|
2019-05-16 20:16:48 +00:00
|
|
|
#define tcg_gen_gvec_sars tcg_gen_gvec_sars_arm
|
2019-05-16 19:47:43 +00:00
|
|
|
#define tcg_gen_gvec_sarv tcg_gen_gvec_sarv_arm
|
|
|
|
#define tcg_gen_gvec_shl8v tcg_gen_gvec_shl8v_arm
|
|
|
|
#define tcg_gen_gvec_shl16v tcg_gen_gvec_shl16v_arm
|
|
|
|
#define tcg_gen_gvec_shl32v tcg_gen_gvec_shl32v_arm
|
|
|
|
#define tcg_gen_gvec_shl64v tcg_gen_gvec_shl64v_arm
|
2018-03-06 18:45:25 +00:00
|
|
|
#define tcg_gen_gvec_shli tcg_gen_gvec_shli_arm
|
2019-05-16 20:16:48 +00:00
|
|
|
#define tcg_gen_gvec_shls tcg_gen_gvec_shls_arm
|
2019-05-16 19:47:43 +00:00
|
|
|
#define tcg_gen_gvec_shlv tcg_gen_gvec_shlv_arm
|
2018-03-06 18:45:25 +00:00
|
|
|
#define tcg_gen_gvec_shri tcg_gen_gvec_shri_arm
|
2019-05-16 20:16:48 +00:00
|
|
|
#define tcg_gen_gvec_shrs tcg_gen_gvec_shrs_arm
|
2019-05-16 19:47:43 +00:00
|
|
|
#define tcg_gen_gvec_shrv tcg_gen_gvec_shrv_arm
|
|
|
|
#define tcg_gen_gvec_shr8v tcg_gen_gvec_shr8v_arm
|
|
|
|
#define tcg_gen_gvec_shr16v tcg_gen_gvec_shr16v_arm
|
|
|
|
#define tcg_gen_gvec_shr32v tcg_gen_gvec_shr32v_arm
|
|
|
|
#define tcg_gen_gvec_shr64v tcg_gen_gvec_shr64v_arm
|
2019-01-29 21:23:24 +00:00
|
|
|
#define tcg_gen_gvec_smax tcg_gen_gvec_smax_arm
|
|
|
|
#define tcg_gen_gvec_smin tcg_gen_gvec_smin_arm
|
2018-03-06 19:46:05 +00:00
|
|
|
#define tcg_gen_gvec_ssadd tcg_gen_gvec_ssadd_arm
|
|
|
|
#define tcg_gen_gvec_sssub tcg_gen_gvec_sssub_arm
|
2018-03-06 17:19:54 +00:00
|
|
|
#define tcg_gen_gvec_sub tcg_gen_gvec_sub_arm
|
2018-03-06 19:54:25 +00:00
|
|
|
#define tcg_gen_gvec_subs tcg_gen_gvec_subs_arm
|
|
|
|
#define tcg_gen_gvec_subs8 tcg_gen_gvec_subs8_arm
|
|
|
|
#define tcg_gen_gvec_subs16 tcg_gen_gvec_subs16_arm
|
|
|
|
#define tcg_gen_gvec_subs32 tcg_gen_gvec_subs32_arm
|
|
|
|
#define tcg_gen_gvec_subs64 tcg_gen_gvec_subs64_arm
|
2019-01-29 21:23:24 +00:00
|
|
|
#define tcg_gen_gvec_umax tcg_gen_gvec_umax_arm
|
|
|
|
#define tcg_gen_gvec_umin tcg_gen_gvec_umin_arm
|
2018-03-06 19:46:05 +00:00
|
|
|
#define tcg_gen_gvec_usadd tcg_gen_gvec_usadd_arm
|
|
|
|
#define tcg_gen_gvec_ussub tcg_gen_gvec_ussub_arm
|
2018-03-06 17:19:54 +00:00
|
|
|
#define tcg_gen_gvec_xor tcg_gen_gvec_xor_arm
|
2018-03-06 19:54:25 +00:00
|
|
|
#define tcg_gen_gvec_xori tcg_gen_gvec_xori_arm
|
|
|
|
#define tcg_gen_gvec_xors tcg_gen_gvec_xors_arm
|
2018-02-11 17:31:22 +00:00
|
|
|
#define tcg_gen_insn_start tcg_gen_insn_start_arm
|
2018-02-08 20:19:28 +00:00
|
|
|
#define tcg_gen_ld16s_i64 tcg_gen_ld16s_i64_arm
|
|
|
|
#define tcg_gen_ld16u_i64 tcg_gen_ld16u_i64_arm
|
|
|
|
#define tcg_gen_ld32s_i64 tcg_gen_ld32s_i64_arm
|
|
|
|
#define tcg_gen_ld32u_i64 tcg_gen_ld32u_i64_arm
|
|
|
|
#define tcg_gen_ld8s_i64 tcg_gen_ld8s_i64_arm
|
|
|
|
#define tcg_gen_ld8u_i64 tcg_gen_ld8u_i64_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tcg_gen_ld_i32 tcg_gen_ld_i32_arm
|
|
|
|
#define tcg_gen_ld_i64 tcg_gen_ld_i64_arm
|
2018-03-06 16:49:50 +00:00
|
|
|
#define tcg_gen_ld_vec tcg_gen_ld_vec_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tcg_gen_ldst_op_i32 tcg_gen_ldst_op_i32_arm
|
|
|
|
#define tcg_gen_ldst_op_i64 tcg_gen_ldst_op_i64_arm
|
2018-03-03 01:56:29 +00:00
|
|
|
#define tcg_gen_lookup_and_goto_ptr tcg_gen_lookup_and_goto_ptr_arm
|
2018-02-26 07:59:13 +00:00
|
|
|
#define tcg_gen_mb tcg_gen_mb_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tcg_gen_mov_i32 tcg_gen_mov_i32_arm
|
|
|
|
#define tcg_gen_mov_i64 tcg_gen_mov_i64_arm
|
2018-03-06 16:49:50 +00:00
|
|
|
#define tcg_gen_mov_vec tcg_gen_mov_vec_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define tcg_gen_movcond_i32 tcg_gen_movcond_i32_arm
|
|
|
|
#define tcg_gen_movcond_i64 tcg_gen_movcond_i64_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tcg_gen_movi_i32 tcg_gen_movi_i32_arm
|
|
|
|
#define tcg_gen_movi_i64 tcg_gen_movi_i64_arm
|
|
|
|
#define tcg_gen_mul_i32 tcg_gen_mul_i32_arm
|
2018-02-08 20:19:28 +00:00
|
|
|
#define tcg_gen_mul_i64 tcg_gen_mul_i64_arm
|
2018-03-06 19:36:48 +00:00
|
|
|
#define tcg_gen_mul_vec tcg_gen_mul_vec_arm
|
2018-02-08 20:19:28 +00:00
|
|
|
#define tcg_gen_muli_i32 tcg_gen_muli_i32_arm
|
|
|
|
#define tcg_gen_muli_i64 tcg_gen_muli_i64_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tcg_gen_muls2_i32 tcg_gen_muls2_i32_arm
|
2018-02-08 20:19:28 +00:00
|
|
|
#define tcg_gen_muls2_i64 tcg_gen_muls2_i64_arm
|
2018-03-01 13:37:11 +00:00
|
|
|
#define tcg_gen_mulsu2_i32 tcg_gen_mulsu2_i32_arm
|
|
|
|
#define tcg_gen_mulsu2_i64 tcg_gen_mulsu2_i64_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tcg_gen_mulu2_i32 tcg_gen_mulu2_i32_arm
|
2018-02-08 20:19:28 +00:00
|
|
|
#define tcg_gen_mulu2_i64 tcg_gen_mulu2_i64_arm
|
|
|
|
#define tcg_gen_nand_i32 tcg_gen_nand_i32_arm
|
|
|
|
#define tcg_gen_nand_i64 tcg_gen_nand_i64_arm
|
2019-01-29 20:56:03 +00:00
|
|
|
#define tcg_gen_nand_vec tcg_gen_nand_vec_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tcg_gen_neg_i32 tcg_gen_neg_i32_arm
|
|
|
|
#define tcg_gen_neg_i64 tcg_gen_neg_i64_arm
|
2018-03-06 16:49:50 +00:00
|
|
|
#define tcg_gen_neg_vec tcg_gen_neg_vec_arm
|
2018-02-08 20:19:28 +00:00
|
|
|
#define tcg_gen_nor_i32 tcg_gen_nor_i32_arm
|
|
|
|
#define tcg_gen_nor_i64 tcg_gen_nor_i64_arm
|
2018-03-06 16:49:50 +00:00
|
|
|
#define tcg_gen_nor_vec tcg_gen_nor_vec_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tcg_gen_not_i32 tcg_gen_not_i32_arm
|
2018-02-08 20:19:28 +00:00
|
|
|
#define tcg_gen_not_i64 tcg_gen_not_i64_arm
|
2018-03-06 16:49:50 +00:00
|
|
|
#define tcg_gen_not_vec tcg_gen_not_vec_arm
|
2018-02-08 20:19:28 +00:00
|
|
|
#define tcg_gen_op1 tcg_gen_op1_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tcg_gen_op1i tcg_gen_op1i_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define tcg_gen_op2 tcg_gen_op2_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tcg_gen_op2_i32 tcg_gen_op2_i32_arm
|
|
|
|
#define tcg_gen_op2_i64 tcg_gen_op2_i64_arm
|
|
|
|
#define tcg_gen_op2i_i32 tcg_gen_op2i_i32_arm
|
|
|
|
#define tcg_gen_op2i_i64 tcg_gen_op2i_i64_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define tcg_gen_op3 tcg_gen_op3_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tcg_gen_op3_i32 tcg_gen_op3_i32_arm
|
|
|
|
#define tcg_gen_op3_i64 tcg_gen_op3_i64_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define tcg_gen_op4 tcg_gen_op4_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tcg_gen_op4_i32 tcg_gen_op4_i32_arm
|
|
|
|
#define tcg_gen_op4i_i32 tcg_gen_op4i_i32_arm
|
|
|
|
#define tcg_gen_op4ii_i32 tcg_gen_op4ii_i32_arm
|
|
|
|
#define tcg_gen_op4ii_i64 tcg_gen_op4ii_i64_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define tcg_gen_op5 tcg_gen_op5_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tcg_gen_op5ii_i32 tcg_gen_op5ii_i32_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define tcg_gen_op6 tcg_gen_op6_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tcg_gen_op6_i32 tcg_gen_op6_i32_arm
|
|
|
|
#define tcg_gen_op6i_i32 tcg_gen_op6i_i32_arm
|
|
|
|
#define tcg_gen_op6i_i64 tcg_gen_op6i_i64_arm
|
|
|
|
#define tcg_gen_or_i32 tcg_gen_or_i32_arm
|
|
|
|
#define tcg_gen_or_i64 tcg_gen_or_i64_arm
|
2018-03-06 16:49:50 +00:00
|
|
|
#define tcg_gen_or_vec tcg_gen_or_vec_arm
|
2018-02-26 00:07:14 +00:00
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#define tcg_gen_orc_i32 tcg_gen_orc_i32_arm
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#define tcg_gen_orc_i64 tcg_gen_orc_i64_arm
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2018-03-06 16:49:50 +00:00
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#define tcg_gen_orc_vec tcg_gen_orc_vec_arm
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2015-08-21 07:04:50 +00:00
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#define tcg_gen_ori_i32 tcg_gen_ori_i32_arm
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2018-02-08 20:19:28 +00:00
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#define tcg_gen_ori_i64 tcg_gen_ori_i64_arm
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2015-08-21 07:04:50 +00:00
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#define tcg_gen_qemu_ld_i32 tcg_gen_qemu_ld_i32_arm
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#define tcg_gen_qemu_ld_i64 tcg_gen_qemu_ld_i64_arm
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#define tcg_gen_qemu_st_i32 tcg_gen_qemu_st_i32_arm
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#define tcg_gen_qemu_st_i64 tcg_gen_qemu_st_i64_arm
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2018-02-08 20:19:28 +00:00
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#define tcg_gen_rem_i32 tcg_gen_rem_i32_arm
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#define tcg_gen_rem_i64 tcg_gen_rem_i64_arm
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#define tcg_gen_remu_i32 tcg_gen_remu_i32_arm
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#define tcg_gen_remu_i64 tcg_gen_remu_i64_arm
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2015-08-21 07:04:50 +00:00
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#define tcg_gen_rotl_i32 tcg_gen_rotl_i32_arm
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2018-02-08 20:19:28 +00:00
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#define tcg_gen_rotl_i64 tcg_gen_rotl_i64_arm
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2015-08-21 07:04:50 +00:00
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#define tcg_gen_rotli_i32 tcg_gen_rotli_i32_arm
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2018-02-08 20:19:28 +00:00
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#define tcg_gen_rotli_i64 tcg_gen_rotli_i64_arm
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2015-08-21 07:04:50 +00:00
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#define tcg_gen_rotr_i32 tcg_gen_rotr_i32_arm
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2018-02-08 20:19:28 +00:00
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#define tcg_gen_rotr_i64 tcg_gen_rotr_i64_arm
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2015-08-21 07:04:50 +00:00
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#define tcg_gen_rotri_i32 tcg_gen_rotri_i32_arm
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2018-02-08 20:19:28 +00:00
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#define tcg_gen_rotri_i64 tcg_gen_rotri_i64_arm
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2015-08-21 07:04:50 +00:00
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#define tcg_gen_sar_i32 tcg_gen_sar_i32_arm
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2018-02-08 20:19:28 +00:00
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#define tcg_gen_sar_i64 tcg_gen_sar_i64_arm
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2015-08-21 07:04:50 +00:00
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#define tcg_gen_sari_i32 tcg_gen_sari_i32_arm
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2018-02-08 20:19:28 +00:00
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#define tcg_gen_sari_i64 tcg_gen_sari_i64_arm
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2018-03-06 18:45:25 +00:00
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#define tcg_gen_sari_vec tcg_gen_sari_vec_arm
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2019-05-16 20:16:48 +00:00
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#define tcg_gen_sars_vec tcg_gen_sars_vec_arm
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2019-05-16 19:47:43 +00:00
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#define tcg_gen_sarv_vec tcg_gen_sarv_vec_arm
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2015-08-21 07:04:50 +00:00
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#define tcg_gen_setcond_i32 tcg_gen_setcond_i32_arm
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2018-02-08 20:19:28 +00:00
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#define tcg_gen_setcond_i64 tcg_gen_setcond_i64_arm
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#define tcg_gen_setcondi_i32 tcg_gen_setcondi_i32_arm
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#define tcg_gen_setcondi_i64 tcg_gen_setcondi_i64_arm
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2018-03-01 18:13:49 +00:00
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#define tcg_gen_sextract_i32 tcg_gen_sextract_i32_arm
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#define tcg_gen_sextract_i64 tcg_gen_sextract_i64_arm
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2018-02-26 00:07:14 +00:00
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#define tcg_gen_shifti_i64 tcg_gen_shifti_i64_arm
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2015-08-21 07:04:50 +00:00
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#define tcg_gen_shl_i32 tcg_gen_shl_i32_arm
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#define tcg_gen_shl_i64 tcg_gen_shl_i64_arm
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#define tcg_gen_shli_i32 tcg_gen_shli_i32_arm
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#define tcg_gen_shli_i64 tcg_gen_shli_i64_arm
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2018-03-06 18:45:25 +00:00
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#define tcg_gen_shli_vec tcg_gen_shli_vec_arm
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2019-05-16 20:16:48 +00:00
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#define tcg_gen_shls_vec tcg_gen_shls_vec_arm
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2019-05-16 19:47:43 +00:00
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#define tcg_gen_shlv_vec tcg_gen_shlv_vec_arm
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2015-08-21 07:04:50 +00:00
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#define tcg_gen_shr_i32 tcg_gen_shr_i32_arm
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#define tcg_gen_shr_i64 tcg_gen_shr_i64_arm
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#define tcg_gen_shri_i32 tcg_gen_shri_i32_arm
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#define tcg_gen_shri_i64 tcg_gen_shri_i64_arm
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2018-03-06 18:45:25 +00:00
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#define tcg_gen_shri_vec tcg_gen_shri_vec_arm
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2019-05-16 20:16:48 +00:00
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#define tcg_gen_shrs_vec tcg_gen_shrs_vec_arm
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2019-05-16 19:47:43 +00:00
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#define tcg_gen_shrv_vec tcg_gen_shrv_vec_arm
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2018-05-14 11:29:35 +00:00
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#define tcg_gen_smax_i32 tcg_gen_smax_i32_arm
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#define tcg_gen_smax_i64 tcg_gen_smax_i64_arm
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2019-01-29 21:23:24 +00:00
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#define tcg_gen_smax_vec tcg_gen_smax_vec_arm
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2018-05-14 11:29:35 +00:00
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#define tcg_gen_smin_i32 tcg_gen_smin_i32_arm
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#define tcg_gen_smin_i64 tcg_gen_smin_i64_arm
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2019-01-29 21:23:24 +00:00
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#define tcg_gen_smin_vec tcg_gen_smin_vec_arm
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2019-01-29 21:08:12 +00:00
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#define tcg_gen_ssadd_vec tcg_gen_ssadd_vec_arm
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#define tcg_gen_sssub_vec tcg_gen_sssub_vec_arm
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2015-08-21 07:04:50 +00:00
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#define tcg_gen_st_i32 tcg_gen_st_i32_arm
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#define tcg_gen_st_i64 tcg_gen_st_i64_arm
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2018-03-06 16:49:50 +00:00
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#define tcg_gen_st_vec tcg_gen_st_vec_arm
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#define tcg_gen_stl_vec tcg_gen_stl_vec_arm
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2018-02-08 20:19:28 +00:00
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#define tcg_gen_sub2_i32 tcg_gen_sub2_i32_arm
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#define tcg_gen_sub2_i64 tcg_gen_sub2_i64_arm
|
2015-08-21 07:04:50 +00:00
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#define tcg_gen_sub_i32 tcg_gen_sub_i32_arm
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#define tcg_gen_sub_i64 tcg_gen_sub_i64_arm
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2018-03-06 16:49:50 +00:00
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#define tcg_gen_sub_vec tcg_gen_sub_vec_arm
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2018-02-08 20:19:28 +00:00
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#define tcg_gen_subfi_i32 tcg_gen_subfi_i32_arm
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#define tcg_gen_subfi_i64 tcg_gen_subfi_i64_arm
|
2015-08-21 07:04:50 +00:00
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#define tcg_gen_subi_i32 tcg_gen_subi_i32_arm
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2018-02-08 20:19:28 +00:00
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#define tcg_gen_subi_i64 tcg_gen_subi_i64_arm
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2018-05-14 11:29:35 +00:00
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#define tcg_gen_umax_i32 tcg_gen_umax_i32_arm
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#define tcg_gen_umax_i64 tcg_gen_umax_i64_arm
|
2019-01-29 21:23:24 +00:00
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#define tcg_gen_umax_vec tcg_gen_umax_vec_arm
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2018-05-14 11:29:35 +00:00
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#define tcg_gen_umin_i32 tcg_gen_umin_i32_arm
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#define tcg_gen_umin_i64 tcg_gen_umin_i64_arm
|
2019-01-29 21:23:24 +00:00
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#define tcg_gen_umin_vec tcg_gen_umin_vec_arm
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2019-01-29 21:08:12 +00:00
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#define tcg_gen_usadd_vec tcg_gen_usadd_vec_arm
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#define tcg_gen_ussub_vec tcg_gen_ussub_vec_arm
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2018-03-06 17:19:54 +00:00
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#define tcg_gen_vec_add8_i64 tcg_gen_vec_add8_i64_arm
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#define tcg_gen_vec_add16_i64 tcg_gen_vec_add16_i64_arm
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#define tcg_gen_vec_add32_i64 tcg_gen_vec_add32_i64_arm
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#define tcg_gen_vec_neg8_i64 tcg_gen_vec_neg8_i64_arm
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#define tcg_gen_vec_neg16_i64 tcg_gen_vec_neg16_i64_arm
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#define tcg_gen_vec_neg32_i64 tcg_gen_vec_neg32_i64_arm
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2018-03-06 18:45:25 +00:00
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#define tcg_gen_vec_sar8i_i64 tcg_gen_vec_sar8i_i64_arm
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#define tcg_gen_vec_sar16i_i64 tcg_gen_vec_sar16i_i64_arm
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#define tcg_gen_vec_shl8i_i64 tcg_gen_vec_shl8i_i64_arm
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#define tcg_gen_vec_shl16i_i64 tcg_gen_vec_shl16i_i64_arm
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#define tcg_gen_vec_shr8i_i64 tcg_gen_vec_shr8i_i64_arm
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#define tcg_gen_vec_shr16i_i64 tcg_gen_vec_shr16i_i64_arm
|
2018-03-06 17:19:54 +00:00
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#define tcg_gen_vec_sub8_i64 tcg_gen_vec_sub8_i64_arm
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#define tcg_gen_vec_sub16_i64 tcg_gen_vec_sub16_i64_arm
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#define tcg_gen_vec_sub32_i64 tcg_gen_vec_sub32_i64_arm
|
2015-08-21 07:04:50 +00:00
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#define tcg_gen_xor_i32 tcg_gen_xor_i32_arm
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#define tcg_gen_xor_i64 tcg_gen_xor_i64_arm
|
2018-03-06 16:49:50 +00:00
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#define tcg_gen_xor_vec tcg_gen_xor_vec_arm
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2015-08-21 07:04:50 +00:00
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#define tcg_gen_xori_i32 tcg_gen_xori_i32_arm
|
2018-02-08 20:19:28 +00:00
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#define tcg_gen_xori_i64 tcg_gen_xori_i64_arm
|
2015-08-21 07:04:50 +00:00
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#define tcg_get_arg_str_i32 tcg_get_arg_str_i32_arm
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#define tcg_get_arg_str_i64 tcg_get_arg_str_i64_arm
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#define tcg_get_arg_str_idx tcg_get_arg_str_idx_arm
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#define tcg_global_mem_new_i32 tcg_global_mem_new_i32_arm
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#define tcg_global_mem_new_i64 tcg_global_mem_new_i64_arm
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#define tcg_global_mem_new_internal tcg_global_mem_new_internal_arm
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#define tcg_global_reg_new_i32 tcg_global_reg_new_i32_arm
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#define tcg_global_reg_new_i64 tcg_global_reg_new_i64_arm
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#define tcg_global_reg_new_internal tcg_global_reg_new_internal_arm
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#define tcg_handle_interrupt tcg_handle_interrupt_arm
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#define tcg_init tcg_init_arm
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#define tcg_invert_cond tcg_invert_cond_arm
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#define tcg_la_bb_end tcg_la_bb_end_arm
|
2015-12-21 10:01:01 +00:00
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#define tcg_la_br_end tcg_la_br_end_arm
|
2015-08-21 07:04:50 +00:00
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#define tcg_la_func_end tcg_la_func_end_arm
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#define tcg_liveness_analysis tcg_liveness_analysis_arm
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#define tcg_malloc tcg_malloc_arm
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#define tcg_malloc_internal tcg_malloc_internal_arm
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#define tcg_op_defs_org tcg_op_defs_org_arm
|
2018-02-26 03:23:00 +00:00
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#define tcg_op_insert_after tcg_op_insert_after_arm
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#define tcg_op_insert_before tcg_op_insert_before_arm
|
2018-02-09 18:03:25 +00:00
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#define tcg_op_remove tcg_op_remove_arm
|
2018-03-05 04:20:12 +00:00
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#define tcg_op_supported tcg_op_supported_arm
|
2015-08-21 07:04:50 +00:00
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#define tcg_opt_gen_mov tcg_opt_gen_mov_arm
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#define tcg_opt_gen_movi tcg_opt_gen_movi_arm
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#define tcg_optimize tcg_optimize_arm
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#define tcg_out16 tcg_out16_arm
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#define tcg_out32 tcg_out32_arm
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#define tcg_out64 tcg_out64_arm
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#define tcg_out8 tcg_out8_arm
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#define tcg_out_addi tcg_out_addi_arm
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#define tcg_out_branch tcg_out_branch_arm
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#define tcg_out_brcond32 tcg_out_brcond32_arm
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#define tcg_out_brcond64 tcg_out_brcond64_arm
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#define tcg_out_bswap32 tcg_out_bswap32_arm
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#define tcg_out_bswap64 tcg_out_bswap64_arm
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#define tcg_out_call tcg_out_call_arm
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#define tcg_out_cmp tcg_out_cmp_arm
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#define tcg_out_ext16s tcg_out_ext16s_arm
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#define tcg_out_ext16u tcg_out_ext16u_arm
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#define tcg_out_ext32s tcg_out_ext32s_arm
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#define tcg_out_ext32u tcg_out_ext32u_arm
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#define tcg_out_ext8s tcg_out_ext8s_arm
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#define tcg_out_ext8u tcg_out_ext8u_arm
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#define tcg_out_jmp tcg_out_jmp_arm
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#define tcg_out_jxx tcg_out_jxx_arm
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#define tcg_out_label tcg_out_label_arm
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#define tcg_out_ld tcg_out_ld_arm
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#define tcg_out_modrm tcg_out_modrm_arm
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#define tcg_out_modrm_offset tcg_out_modrm_offset_arm
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#define tcg_out_modrm_sib_offset tcg_out_modrm_sib_offset_arm
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#define tcg_out_mov tcg_out_mov_arm
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#define tcg_out_movcond32 tcg_out_movcond32_arm
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#define tcg_out_movcond64 tcg_out_movcond64_arm
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#define tcg_out_movi tcg_out_movi_arm
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#define tcg_out_op tcg_out_op_arm
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#define tcg_out_pop tcg_out_pop_arm
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#define tcg_out_push tcg_out_push_arm
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#define tcg_out_qemu_ld tcg_out_qemu_ld_arm
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#define tcg_out_qemu_ld_direct tcg_out_qemu_ld_direct_arm
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#define tcg_out_qemu_ld_slow_path tcg_out_qemu_ld_slow_path_arm
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#define tcg_out_qemu_st tcg_out_qemu_st_arm
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#define tcg_out_qemu_st_direct tcg_out_qemu_st_direct_arm
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#define tcg_out_qemu_st_slow_path tcg_out_qemu_st_slow_path_arm
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#define tcg_out_reloc tcg_out_reloc_arm
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#define tcg_out_rolw_8 tcg_out_rolw_8_arm
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#define tcg_out_setcond32 tcg_out_setcond32_arm
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#define tcg_out_setcond64 tcg_out_setcond64_arm
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#define tcg_out_shifti tcg_out_shifti_arm
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#define tcg_out_st tcg_out_st_arm
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#define tcg_out_tb_finalize tcg_out_tb_finalize_arm
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#define tcg_out_tb_init tcg_out_tb_init_arm
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#define tcg_out_tlb_load tcg_out_tlb_load_arm
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#define tcg_out_vex_modrm tcg_out_vex_modrm_arm
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#define tcg_patch32 tcg_patch32_arm
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#define tcg_patch8 tcg_patch8_arm
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#define tcg_pcrel_diff tcg_pcrel_diff_arm
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#define tcg_pool_reset tcg_pool_reset_arm
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#define tcg_prologue_init tcg_prologue_init_arm
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#define tcg_ptr_byte_diff tcg_ptr_byte_diff_arm
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#define tcg_reg_alloc tcg_reg_alloc_arm
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#define tcg_reg_alloc_bb_end tcg_reg_alloc_bb_end_arm
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#define tcg_reg_alloc_call tcg_reg_alloc_call_arm
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#define tcg_reg_alloc_mov tcg_reg_alloc_mov_arm
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#define tcg_reg_alloc_movi tcg_reg_alloc_movi_arm
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#define tcg_reg_alloc_op tcg_reg_alloc_op_arm
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#define tcg_reg_alloc_start tcg_reg_alloc_start_arm
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#define tcg_reg_free tcg_reg_free_arm
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#define tcg_reg_sync tcg_reg_sync_arm
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#define tcg_set_frame tcg_set_frame_arm
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#define tcg_set_nop tcg_set_nop_arm
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#define tcg_swap_cond tcg_swap_cond_arm
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#define tcg_target_call_iarg_regs tcg_target_call_iarg_regs_arm
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#define tcg_target_call_oarg_regs tcg_target_call_oarg_regs_arm
|
2018-02-26 00:07:14 +00:00
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#define tcg_target_callee_save_regs tcg_target_callee_save_regs_arm
|
2015-08-21 07:04:50 +00:00
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#define tcg_target_const_match tcg_target_const_match_arm
|
2018-02-26 00:07:14 +00:00
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#define tcg_target_deposit_valid tcg_target_deposit_valid_arm
|
2015-08-21 07:04:50 +00:00
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#define tcg_target_init tcg_target_init_arm
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#define tcg_target_qemu_prologue tcg_target_qemu_prologue_arm
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|
#define tcg_target_reg_alloc_order tcg_target_reg_alloc_order_arm
|
2018-03-03 22:01:28 +00:00
|
|
|
#define tcg_tb_alloc tcg_tb_alloc_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tcg_temp_alloc tcg_temp_alloc_arm
|
|
|
|
#define tcg_temp_free_internal tcg_temp_free_internal_arm
|
|
|
|
#define tcg_temp_local_new_i32 tcg_temp_local_new_i32_arm
|
|
|
|
#define tcg_temp_local_new_i64 tcg_temp_local_new_i64_arm
|
|
|
|
#define tcg_temp_new_i32 tcg_temp_new_i32_arm
|
|
|
|
#define tcg_temp_new_i64 tcg_temp_new_i64_arm
|
|
|
|
#define tcg_temp_new_internal tcg_temp_new_internal_arm
|
2018-03-06 16:49:50 +00:00
|
|
|
#define tcg_temp_new_vec tcg_temp_new_vec_arm
|
|
|
|
#define tcg_temp_new_vec_matching tcg_temp_new_vec_matching_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tdb_hash tdb_hash_arm
|
|
|
|
#define teecr_write teecr_write_arm
|
|
|
|
#define teehbr_access teehbr_access_arm
|
|
|
|
#define temp_allocate_frame temp_allocate_frame_arm
|
|
|
|
#define temp_dead temp_dead_arm
|
|
|
|
#define temp_save temp_save_arm
|
|
|
|
#define temp_sync temp_sync_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define temps_are_copies temps_are_copies_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tgen_arithi tgen_arithi_arm
|
|
|
|
#define tgen_arithr tgen_arithr_arm
|
|
|
|
#define thumb2_logic_op thumb2_logic_op_arm
|
|
|
|
#define ti925t_initfn ti925t_initfn_arm
|
|
|
|
#define tlb_add_large_page tlb_add_large_page_arm
|
2018-10-23 18:41:10 +00:00
|
|
|
#define tlb_init tlb_init_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define tlb_flush tlb_flush_arm
|
2018-02-15 14:34:07 +00:00
|
|
|
#define tlb_flush_by_mmuidx tlb_flush_by_mmuidx_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tlb_flush_entry tlb_flush_entry_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define tlb_flush_page tlb_flush_page_arm
|
2018-02-15 14:34:07 +00:00
|
|
|
#define tlb_flush_page_by_mmuidx tlb_flush_page_by_mmuidx_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define tlb_is_dirty_ram tlb_is_dirty_ram_arm
|
|
|
|
#define tlb_reset_dirty tlb_reset_dirty_arm
|
|
|
|
#define tlb_reset_dirty_range tlb_reset_dirty_range_arm
|
|
|
|
#define tlb_set_dirty tlb_set_dirty_arm
|
|
|
|
#define tlb_set_page tlb_set_page_arm
|
|
|
|
#define tlb_set_page_with_attrs tlb_set_page_with_attrs_arm
|
|
|
|
#define tlb_vaddr_to_host tlb_vaddr_to_host_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tlbi_aa64_asid_is_write tlbi_aa64_asid_is_write_arm
|
|
|
|
#define tlbi_aa64_asid_write tlbi_aa64_asid_write_arm
|
|
|
|
#define tlbi_aa64_va_is_write tlbi_aa64_va_is_write_arm
|
|
|
|
#define tlbi_aa64_va_write tlbi_aa64_va_write_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define tlbi_aa64_vaa_is_write tlbi_aa64_vaa_is_write_arm
|
|
|
|
#define tlbi_aa64_vaa_write tlbi_aa64_vaa_write_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tlbiall_is_write tlbiall_is_write_arm
|
|
|
|
#define tlbiall_write tlbiall_write_arm
|
|
|
|
#define tlbiasid_is_write tlbiasid_is_write_arm
|
|
|
|
#define tlbiasid_write tlbiasid_write_arm
|
|
|
|
#define tlbimva_is_write tlbimva_is_write_arm
|
|
|
|
#define tlbimva_write tlbimva_write_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define tlbimvaa_is_write tlbimvaa_is_write_arm
|
|
|
|
#define tlbimvaa_write tlbimvaa_write_arm
|
|
|
|
#define to_qiv to_qiv_arm
|
|
|
|
#define to_qov to_qov_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define token_get_type token_get_type_arm
|
|
|
|
#define token_get_value token_get_value_arm
|
|
|
|
#define token_is_escape token_is_escape_arm
|
|
|
|
#define token_is_keyword token_is_keyword_arm
|
|
|
|
#define token_is_operator token_is_operator_arm
|
|
|
|
#define tokens_append_from_iter tokens_append_from_iter_arm
|
|
|
|
#define tosa_init tosa_init_arm
|
2018-03-11 18:49:09 +00:00
|
|
|
#define tosa_machine_init_register_types tosa_machine_init_register_types_arm
|
2018-03-04 19:13:08 +00:00
|
|
|
#define translator_loop translator_loop_arm
|
|
|
|
#define translator_loop_temp_check translator_loop_temp_check_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define tswap32 tswap32_arm
|
|
|
|
#define tswap64 tswap64_arm
|
|
|
|
#define type_class_get_size type_class_get_size_arm
|
|
|
|
#define type_get_by_name type_get_by_name_arm
|
|
|
|
#define type_get_parent type_get_parent_arm
|
|
|
|
#define type_has_parent type_has_parent_arm
|
|
|
|
#define type_initialize type_initialize_arm
|
|
|
|
#define type_initialize_interface type_initialize_interface_arm
|
|
|
|
#define type_is_ancestor type_is_ancestor_arm
|
|
|
|
#define type_new type_new_arm
|
|
|
|
#define type_object_get_size type_object_get_size_arm
|
|
|
|
#define type_register_internal type_register_internal_arm
|
|
|
|
#define type_table_add type_table_add_arm
|
|
|
|
#define type_table_get type_table_get_arm
|
|
|
|
#define type_table_lookup type_table_lookup_arm
|
2018-03-08 17:10:00 +00:00
|
|
|
#define uint16_to_float16 uint16_to_float16_arm
|
2018-08-25 07:41:26 +00:00
|
|
|
#define uint16_to_float16_scalbn uint16_to_float16_scalbn_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define uint16_to_float32 uint16_to_float32_arm
|
2018-08-25 07:41:26 +00:00
|
|
|
#define uint16_to_float32_scalbn uint16_to_float32_scalbn_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define uint16_to_float64 uint16_to_float64_arm
|
2018-08-25 07:41:26 +00:00
|
|
|
#define uint16_to_float64_scalbn uint16_to_float64_scalbn_arm
|
2018-03-08 17:10:00 +00:00
|
|
|
#define uint32_to_float16 uint32_to_float16_arm
|
2018-08-25 07:41:26 +00:00
|
|
|
#define uint32_to_float16_scalbn uint32_to_float16_scalbn_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define uint32_to_float32 uint32_to_float32_arm
|
2018-08-25 07:41:26 +00:00
|
|
|
#define uint32_to_float32_scalbn uint32_to_float32_scalbn_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define uint32_to_float64 uint32_to_float64_arm
|
2018-08-25 07:41:26 +00:00
|
|
|
#define uint32_to_float64_scalbn uint32_to_float64_scalbn_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define uint64_to_float128 uint64_to_float128_arm
|
2018-03-08 17:10:00 +00:00
|
|
|
#define uint64_to_float16 uint64_to_float16_arm
|
2018-08-25 07:41:26 +00:00
|
|
|
#define uint64_to_float16_scalbn uint64_to_float16_scalbn_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define uint64_to_float32 uint64_to_float32_arm
|
2018-08-25 07:41:26 +00:00
|
|
|
#define uint64_to_float32_scalbn uint64_to_float32_scalbn_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define uint64_to_float64 uint64_to_float64_arm
|
2018-08-25 07:41:26 +00:00
|
|
|
#define uint64_to_float64_scalbn uint64_to_float64_scalbn_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define unassigned_io_ops unassigned_io_ops_arm
|
|
|
|
#define unassigned_io_read unassigned_io_read_arm
|
|
|
|
#define unassigned_io_write unassigned_io_write_arm
|
|
|
|
#define unassigned_mem_accepts unassigned_mem_accepts_arm
|
|
|
|
#define unassigned_mem_ops unassigned_mem_ops_arm
|
|
|
|
#define unassigned_mem_read unassigned_mem_read_arm
|
|
|
|
#define unassigned_mem_write unassigned_mem_write_arm
|
2018-03-12 02:23:21 +00:00
|
|
|
#define unicorn_free_empty_flat_view unicorn_free_empty_flat_view_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define update_spsel update_spsel_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define use_idiv_instructions_rt use_idiv_instructions_rt_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define v6_cp_reginfo v6_cp_reginfo_arm
|
|
|
|
#define v6k_cp_reginfo v6k_cp_reginfo_arm
|
|
|
|
#define v7_cp_reginfo v7_cp_reginfo_arm
|
|
|
|
#define v7m_pop v7m_pop_arm
|
|
|
|
#define v7m_push v7m_push_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define v7mp_cp_reginfo v7mp_cp_reginfo_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define v8_cp_reginfo v8_cp_reginfo_arm
|
|
|
|
#define v8_el2_cp_reginfo v8_el2_cp_reginfo_arm
|
|
|
|
#define v8_el3_cp_reginfo v8_el3_cp_reginfo_arm
|
|
|
|
#define v8_el3_no_el2_cp_reginfo v8_el3_no_el2_cp_reginfo_arm
|
|
|
|
#define vapa_cp_reginfo vapa_cp_reginfo_arm
|
|
|
|
#define vbar_write vbar_write_arm
|
2018-03-06 16:49:50 +00:00
|
|
|
#define vec_gen_2 vec_gen_2_arm
|
|
|
|
#define vec_gen_3 vec_gen_3_arm
|
|
|
|
#define vec_gen_4 vec_gen_4_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define vfp_exceptbits_from_host vfp_exceptbits_from_host_arm
|
|
|
|
#define vfp_exceptbits_to_host vfp_exceptbits_to_host_arm
|
|
|
|
#define vfp_get_fpcr vfp_get_fpcr_arm
|
|
|
|
#define vfp_get_fpscr vfp_get_fpscr_arm
|
|
|
|
#define vfp_get_fpsr vfp_get_fpsr_arm
|
|
|
|
#define vfp_reg_offset vfp_reg_offset_arm
|
|
|
|
#define vfp_set_fpcr vfp_set_fpcr_arm
|
|
|
|
#define vfp_set_fpscr vfp_set_fpscr_arm
|
|
|
|
#define vfp_set_fpsr vfp_set_fpsr_arm
|
|
|
|
#define visit_end_implicit_struct visit_end_implicit_struct_arm
|
|
|
|
#define visit_end_list visit_end_list_arm
|
|
|
|
#define visit_end_struct visit_end_struct_arm
|
|
|
|
#define visit_end_union visit_end_union_arm
|
|
|
|
#define visit_get_next_type visit_get_next_type_arm
|
|
|
|
#define visit_next_list visit_next_list_arm
|
|
|
|
#define visit_optional visit_optional_arm
|
|
|
|
#define visit_start_implicit_struct visit_start_implicit_struct_arm
|
|
|
|
#define visit_start_list visit_start_list_arm
|
|
|
|
#define visit_start_struct visit_start_struct_arm
|
|
|
|
#define visit_start_union visit_start_union_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define vm_start vm_start_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define vmsa_cp_reginfo vmsa_cp_reginfo_arm
|
|
|
|
#define vmsa_tcr_el1_write vmsa_tcr_el1_write_arm
|
|
|
|
#define vmsa_ttbcr_raw_write vmsa_ttbcr_raw_write_arm
|
|
|
|
#define vmsa_ttbcr_reset vmsa_ttbcr_reset_arm
|
|
|
|
#define vmsa_ttbcr_write vmsa_ttbcr_write_arm
|
|
|
|
#define vmsa_ttbr_write vmsa_ttbr_write_arm
|
|
|
|
#define write_cpustate_to_list write_cpustate_to_list_arm
|
|
|
|
#define write_list_to_cpustate write_list_to_cpustate_arm
|
|
|
|
#define write_raw_cp_reg write_raw_cp_reg_arm
|
2018-03-05 06:29:51 +00:00
|
|
|
#define write_v7m_exception write_v7m_exception_arm
|
2018-02-13 16:52:25 +00:00
|
|
|
#define x86_ldl_phys x86_ldl_phys_arm
|
|
|
|
#define x86_ldq_phys x86_ldq_phys_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define x86_ldub_phys x86_ldub_phys_arm
|
|
|
|
#define x86_lduw_phys x86_lduw_phys_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define x86_op_defs x86_op_defs_arm
|
2018-02-13 16:52:25 +00:00
|
|
|
#define x86_stb_phys x86_stb_phys_arm
|
|
|
|
#define x86_stl_phys x86_stl_phys_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define x86_stl_phys_notdirty x86_stl_phys_notdirty_arm
|
2018-02-13 16:52:25 +00:00
|
|
|
#define x86_stq_phys x86_stq_phys_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define x86_stw_phys x86_stw_phys_arm
|
2015-08-21 07:04:50 +00:00
|
|
|
#define xpsr_read xpsr_read_arm
|
|
|
|
#define xpsr_write xpsr_write_arm
|
|
|
|
#define xscale_cp_reginfo xscale_cp_reginfo_arm
|
2018-02-26 00:07:14 +00:00
|
|
|
#define xscale_cpar_write xscale_cpar_write_arm
|
2019-01-22 21:22:50 +00:00
|
|
|
#define aa64_va_parameters aa64_va_parameters_arm
|
2019-01-22 21:25:09 +00:00
|
|
|
#define aa64_va_parameters_both aa64_va_parameters_both_arm
|
2018-03-05 01:11:49 +00:00
|
|
|
#define aarch64_translator_ops aarch64_translator_ops_arm
|
2019-05-16 20:52:26 +00:00
|
|
|
#define arm_cpu_tlb_fill arm_cpu_tlb_fill_arm
|
2019-04-30 14:54:24 +00:00
|
|
|
#define arm_v7m_mmu_idx_all arm_v7m_mmu_idx_all_arm
|
2019-01-22 21:02:35 +00:00
|
|
|
#define arm_v7m_mmu_idx_for_secstate arm_v7m_mmu_idx_for_secstate_arm
|
|
|
|
#define arm_v7m_mmu_idx_for_secstate_and_priv arm_v7m_mmu_idx_for_secstate_and_priv_arm
|
2017-03-15 14:25:35 +00:00
|
|
|
#define ARM_REGS_STORAGE_SIZE ARM_REGS_STORAGE_SIZE_arm
|
2018-12-18 09:26:25 +00:00
|
|
|
#define arm_hcr_el2_eff arm_hcr_el2_eff_arm
|
2019-01-22 21:06:32 +00:00
|
|
|
#define arm_mmu_idx arm_mmu_idx_arm
|
2018-04-26 13:19:21 +00:00
|
|
|
#define arm_register_pre_el_change_hook arm_register_pre_el_change_hook_arm
|
2018-02-26 00:00:31 +00:00
|
|
|
#define arm_register_el_change_hook arm_register_el_change_hook_arm
|
2018-03-02 04:11:30 +00:00
|
|
|
#define arm_reset_cpu arm_reset_cpu_arm
|
|
|
|
#define arm_set_cpu_off arm_set_cpu_off_arm
|
|
|
|
#define arm_set_cpu_on arm_set_cpu_on_arm
|
2019-01-22 21:08:35 +00:00
|
|
|
#define arm_stage1_mmu_idx arm_stage1_mmu_idx_arm
|
2018-11-10 16:02:55 +00:00
|
|
|
#define cmtst_op cmtst_op_arm
|
2019-03-08 18:06:28 +00:00
|
|
|
#define cpu_mmu_index cpu_mmu_index_arm
|
2018-10-08 15:28:08 +00:00
|
|
|
#define fp_exception_el fp_exception_el_arm
|
2018-11-10 16:02:55 +00:00
|
|
|
#define gen_cmtst_i64 gen_cmtst_i64_arm
|
2019-08-08 19:14:35 +00:00
|
|
|
#define get_phys_addr get_phys_addr_arm
|
2019-02-23 00:02:34 +00:00
|
|
|
#define helper_fjcvtzs helper_fjcvtzs_arm
|
|
|
|
#define helper_vjcvt helper_vjcvt_arm
|
2019-01-29 22:09:33 +00:00
|
|
|
#define pmu_init pmu_init_arm
|
2018-11-10 15:58:31 +00:00
|
|
|
#define mla_op mla_op_arm
|
|
|
|
#define mls_op mls_op_arm
|
2019-08-08 19:36:59 +00:00
|
|
|
#define pmsav8_mpu_lookup pmsav8_mpu_lookup_arm
|
2019-01-22 21:57:10 +00:00
|
|
|
#define pmu_op_start pmu_op_start_arm
|
|
|
|
#define pmu_op_finish pmu_op_finish_arm
|
2019-01-22 22:11:29 +00:00
|
|
|
#define pmu_pre_el_change pmu_pre_el_change_arm
|
|
|
|
#define pmu_post_el_change pmu_post_el_change_arm
|
2018-10-08 18:12:15 +00:00
|
|
|
#define raise_exception raise_exception_arm
|
2019-01-22 20:18:47 +00:00
|
|
|
#define raise_exception_ra raise_exception_ra_arm
|
2018-11-10 15:44:20 +00:00
|
|
|
#define sli_op sli_op_arm
|
2019-02-15 23:12:47 +00:00
|
|
|
#define sqadd_op sqadd_op_arm
|
|
|
|
#define sqsub_op sqsub_op_arm
|
2018-11-10 15:44:20 +00:00
|
|
|
#define ssra_op ssra_op_arm
|
|
|
|
#define sri_op sri_op_arm
|
2018-10-08 15:28:08 +00:00
|
|
|
#define sve_exception_el sve_exception_el_arm
|
|
|
|
#define sve_zcr_len_for_el sve_zcr_len_for_el_arm
|
2019-02-15 23:12:47 +00:00
|
|
|
#define uqadd_op uqadd_op_arm
|
|
|
|
#define uqsub_op uqsub_op_arm
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2018-11-10 15:44:20 +00:00
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#define usra_op usra_op_arm
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2019-08-08 19:36:59 +00:00
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#define v8m_security_lookup v8m_security_lookup_arm
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2019-08-08 19:07:15 +00:00
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#define vfp_expand_imm vfp_expand_imm_arm
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2015-08-21 07:04:50 +00:00
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#endif
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